参数资料
型号: SP6201EM5-L-5-0
厂商: Exar Corporation
文件页数: 13/17页
文件大小: 0K
描述: IC REG LDO 5V .2A SOT23-5
标准包装: 400
稳压器拓扑结构: 正,固定式
输出电压: 5V
输入电压: 最高 6V
电压 - 压降(标准): 0.32V @ 200mA
稳压器数量: 1
电流 - 输出: 200mA
电流 - 限制(最小): 300mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: SC-74A,SOT-753
供应商设备封装: SOT-23-5
包装: 散装
其它名称: 1016-1204
S P 6 2 0 0 / S P 6 2 0 1
1 0 0 m A / 2 0 0 m A M i c r o p o w e r C M O S L D O R e g u l a t o r s
P ROTECTION
Current limit behavior is very well controlled,
providing less than 10% variation in the
current limit threshold over the entire
temperature range for both SP6200 and
SP6201. The SP6200 has a current limit of
140mA, while the SP6201 has a current limit
of 420mA. Thermal shutdown activates at
162°C and deactivates at 147°C. Thermal
shutdown is very repeatable with only a 2 to 3
degree variation from device to device.
Thermal shutdown changes by only 1 to 2
degrees with Vin change from 4V to 7V.
E NABLE (S HUTDOWN N OT ) I NPUT
The LDOs are turned off by pulling the EN pin
low and turned on by pulling it high. If it is not
necessary to shut down the LDO, the EN (pin
3) should be tied to IN (pin 1) to keep the
regulator output on at all time. The enable
threshold is 0.9V and does not change more
than 100mV over the entire temperature and
V IN voltage range. The lot to lot variations in
Enable Threshold are also within 100mV.
Shutdown current is guaranteed to be <1μA
without requiring the user to pull enable all
the way to 0V. Standard TTL or CMOS levels
will transition the device from totally on to
totally off.
R ESET N OT (V OUT GOOD ) O UTPUT
An accurate V OUT good indicator is provided on
all the fixed output version devices, pin 4
(RSN), Figure 1. This is an open drain, logic
output that can be used to hold a
microprocessor or microcontroller in a RESET
condition when its power supplied by V OUT is
4% out of nominal regulation. A 1% hysteresis
is included in the Reset Not function, so that
false alarms are not issued as a result of LDO's
output noise. The Reset Not function reacts in
10 to 50μs.
A DJUSTABLE O UTPUT V ERSION
The adjustable version can be programmed to
any voltage from 2.7V to 6V for the industrial
temperature range; 2.5V to 6V for the
commercial temperature range. The output
cannot be programmed below 2.5V due a
headroom restriction. Since the bandgap is
bootstrapped to the output, the output voltage
must be above the minimum bandgap supply
voltage. The bandgap requires 2.7V or greater
at -40°C and requires 2.5V or greater at 0°C.
The regulator's output can be adjusted to a
specific output voltage by using two external
resistors, see block diagram. The resistor's set
the output voltage based on the following
equation:
Resistor values are not critical because the
ADJ node has a high input impedance, but for
best results use resistors of 470kΩ or less. A
capacitor from ADJ to V OUT pin provides
improved noise performance as is shown in
the following plot.
Fig. 42: Noise Performance 10Hz to 100kHz
I NPUT C APACITOR
A small capacitor, 1μF or higher, is required
from V IN to GND to create a high frequency
bypass for the LDO amplifier. Any ceramic or
tantalum capacitor may be used at the input.
Capacitor ESR (effective series resistance)
should be smaller than 3Ω.
O UTPUT C APACITOR
An output capacitor is required between V OUT
and GND to prevent oscillation; a capacitance
as low as 0.22μF can fulfill stability
r equirements in most applications. A 1μF
capacitor will ensure unconditional stability
from no load to full load over the entire input
voltage, output voltage and temperature
range. Larger capacitor values improve the
? 2012 Exar Corporation
13/17
Rev. 2.1.0
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