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参数资料
| 型号： | SP6650UEB |
| 厂商： | Exar Corporation |
| 文件页数： | 10/17页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR SP6650 |
| 标准包装： | 1 |
| 系列： | * |
S P 6 6 5 0
H i g h E f f i c i e n c y 6 0 0 m A S y n c h r o n o u s B u c k R e g u l a t o r
open to prevent inductor current from flowing.
The internal reference and regulator circuitry
are enabled drawing the 70μA light lo ad
quiescent current on pin 2. The rising input
voltage UVLO threshold is +2.7V, with a
typical hysteresis of 120mV to prevent
chattering due to the impedance of the input
source.
U NDER -C URRENT D ETECTION
The synchronous rectifier is comprised of the
inductor discharge switch, a voltage
comparator, and a latch. During the off-time,
positive inductor current flows into the PGND
pin 9 through the low side NMOS switch to LX
pin 10, through the inductor and the output
capacitor, and back to pin 9. The comparator
monitors the voltage drop across the
discharge NMOS. As the inductor current
approaches zero, the channel voltage sign
goes from negative to positive, causing the
comparator to trigger the latch and open the
switch to prevent inductor current reversal.
This circuit along with the ontime one shot
puts the converter into PFM mode and
improves light load efficiency when the load
current is less than half the inductor ripple
current defined by K ON /L.
T HERMAL S HUTDOWN
The converter will open both power switches if
the die junction temperature rises above
140°C. The die must cool down below 126°C
before the regulator is re-enabled. This feature
protects the SP6650 and surrounding circuitry
from excessive power dissipation due to fault
conditions.
S HUTDOWN /E NABLE C ONTROL
Pin 5 of the device is a logic level control pin
that shuts down the converter with a logic low,
or enables the converter with a logic high.
When the converter is shut down, the power
switches are opened and all circuit biasing is
extinguished leaving only junction leakage
currents on supply pins 1 and 2. After pin 5 is
brought high to enable the converter, there is
a turn on delay to allow the regulator circuitry
to re-establish itself. Power conversion begins
with the assertion of the internal reference
ready signal which occurs approximately
150μs after the enable signal is received.
B ATTERY L OW I NDICATOR
The regulator bias voltage on pin 2 (V IN ) is
divided down and compared to the internal
+1.25V reference voltage. When pin 2 voltage
drops below +3.00V, an open drain NMOS on
pin 3 (BLON) sinks current to ground. Tying a
resistor from pin 3 to V IN or V OUT creates a
logic level battery low indicator. A low
bandwidth comparator and 2.9% hysteresis
filter the input voltage ripple to prevent noisy
transitions at the threshold.
E XTERNAL F EEDBACK P IN
The SP6650 comes with a factory preset
output voltage of +3.3V when pin 6 (FB) is
grounded. Otherwise, the output voltage can
be externally programmed within the range
+1.25V to +5.0V by tying a resistor from FB
to ground and FB to V OUT (pin7). See the
applications section for resistor selection
information.
? 2012 Exar Corporation
10/17
Rev. 2.0.0
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| SP6651AER | 制造商:SIPEX 制造商全称:Sipex Corporation 功能描述:High Efficiency 800mA Synchronous Buck Regulator Ideal for portable designs powered with Li Ion battery |
| SP6651AER/TR | 制造商:SIPEX 制造商全称:Sipex Corporation 功能描述:High Efficiency 800mA Synchronous Buck Regulator Ideal for portable designs powered with Li Ion battery |
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