参数资料
型号: SP6652LEDEB
厂商: Exar Corporation
文件页数: 8/16页
文件大小: 0K
描述: EVAL BOARD FOR SP6652LED
标准包装: 1
系列: *
APPLICATIONS INFORMATION
L1
VOUT
4.7 μ H
1 PGND
LX
10
R
C3
10 μ F
FBH
R FBL
Rz
4k ?
2 SGND
3 FB
4 COMP
5 SD
PVIN
SVIN
SYNC
MODE
9
8
7
6
R1
10 ?
C2
1 μ F
VIN
C1
10 μ F
SP6652
Cc
10nF
SD
V IN
Complete Application Circuit.
SYNC
COMPONENT SELECTION
The SP6652 PWM buck regulator circuit
requires 3 capacitors: 10μF for the P VIN input,
1μF input bypass for the S VIN and 10μF
for the output are typically recommended.
For the input capacitor, a value even larger
than 10μF will help reduce input voltage
ripple for applications sensitive to ripple on
the battery voltage. See the Typical Per -
formance Characteristics section for wave -
forms on input and output ripple with 10μF
capacitors. All the capacitors should be
surface mount ceramic for low lead induc -
tance necessary at the 1.4MHz switching
frequency of the SP6652 and to obtain low
ESR. This also helps improve bypassing
on the input pin and ripple on the output.
Ceramic capacitors with X5R or X7R tem -
perature grade are recommended for most
applications. A selection of recommended
capacitors is included in Table 1. The 1μF
S VIN input capacitor should have a series
resistor of about 10Ω value connected
from the input to the S VIN pin to form an RC
low pass filter to remove high frequency
spikes present on the input switching pin
P VIN . This will keep the SP6652 internal
reference and other sensitive circuits noise
free and ensure better output regulation.
The GND returns for the P VIN capacitor and
the output capacitor should be connected
directly to the P GND pin, which should con -
nect to the thermal pad ground located un -
der the SP6652. The GND return for the
1μF S VIN capacitor should be connected to
the S GND pin, which should be connected
separately to the P GND pin to avoid adding
P GND noise to the SP6652 S GND pin. See
the Typical SP6652 Circuit Layout for de -
tails on the recommended layout.
Output Voltage Selection
To set the output voltage for the SP6652,
a pair of resistors, R F and R I are used as a
voltage divider between the output voltage
at the output capacitor and the FB pin and
GND, as shown in the typical application cir -
cuit. The recommended value for the R I re -
sistor is 100KΩ to 200KΩ to keep the quies -
cent current low, but not have the impedance
too high at the FB pin for good regulation.
Oct10-07 RevJ
SP6652 1A, High Efficiency, Current Mode PWM Buck Regulator
8
? 2007 Sipex Corporation
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