参数资料
型号: SP7653EB
厂商: Exar Corporation
文件页数: 4/15页
文件大小: 0K
描述: EVAL BOARD FOR SP7653
标准包装: 1
系列: *
PIN DESCRIPTION
Pin #
1-3
4,8,19-21
5
6
7
9
10-13
14-16,23-26
17
18
22
Pin Name
P GND
GND
V FB
COMP
UVIN
SS
V IN
LX
NC
BST
Vcc
Description
Ground connection for the synchronous rectifier
Ground Pin. The control circuitry of the IC and lower power driver are
referenced to this pin. Return separately from other ground traces to the (-)
terminal of C OUT .
Feedback Voltage and Short Circuit Detection pin. It is the inverting input of
the Error Amplifier and serves as the output voltage feedback point for the
Buck Converter. The output voltage is sensed and can be adjusted through
an external resistor divider. Whenever V FB drops 0.25V below the positive
reference, a short circuit fault is detected and the IC enters hiccup mode.
Output of the Error Amplifier. It is internally connected to the inverting input of
the PWM comparator. An optimal filter combination is chosen and connected
to this pin and either ground or V FB to stabilize the voltage mode loop.
UVLO input for V IN voltage. Connect a resistor divider between V IN and UV IN
to set minimum operating voltage.
Soft Start. Connect an external capacitor between SS and GND to set the
soft start rate based on the 10μA source current. The SS pin is held low via a
1mA (min) current during all fault conditions.
Input connection to the high side N-channel MOSFET. Place a decoupling
capacitor between this pin and PGND.
Connect an inductor between this pin and V OUT
No Connect
High side driver supply pin. Connect BST to the external boost diode and
capacitor as shown in the Typical Application Circuit on page 1. High side
driver is connected between BST pin and SWN pin.
Input for external 5V bias supply
General Overview
The SP7653 is a fixed frequency, voltage mode,
synchronous PWM regulator optimized for high
efficiency. The part has been designed to be
especially attractive for high input voltages of
2.5V to 20V.
The heart of the SP7653 is a wide bandwidth
transconductance amplifier designed to accom-
modate Type II and Type III compensation
schemes. A precision 0.8V reference, present on
the positive terminal of the error amplifier,
permits the programming of the output voltage
down to 0.8V via the V FB pin. The output of the
error amplifier, COMP, compared to a 1.1V
peak-to-peak ramp is responsible for trailing
edge PWM control. This voltage ramp, and
PWM control logic are governed by the internal
oscillator that accurately sets the PWM fre-
quency to 1.3MHz.
THEORY OF OPERATION
The SP7653 contains two unique control fea-
tures that are very powerful in distributed appli-
cations. First, asynchronous driver control is
enabled during startup, to prohibit the low side
switch from pulling down the output until the
high side switch has attempted to turn on. Sec-
ond, a 100% duty cycle timeout ensures that the
low side switch is periodically enhanced during
extended periods at 100% duty cycle. This guar-
antees the synchronized refreshing of the Boost
capacitor during very large duty cycle ratios.
The SP7653 also contains a number of valuable
protection features. Programmable V IN UVLO
allows the user to set the exact value at which the
conversion voltage can safely begin down con-
version, and an internal V CC UVLO which en-
sures that the controller itself has enough volt-
age to operate properly. Other protection fea-
2/17/06
Date:   /20/06
Wide Input Input      Range,Range,       BuckBuck
SP7653 SP7653 Wide Voltage Voltage  .3MHz, 1.3MHz, Regulator
  4
? Copyright 2006 Sipex Corporation
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