参数资料
型号: SP809EK-L-4-6/TR
厂商: Exar Corporation
文件页数: 6/8页
文件大小: 0K
描述: IC MPU RESET CIRC 4.6V SOT23-3
标准包装: 1
类型: 简单复位/加电复位
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 低有效
复位超时: 最小为 140 ms
电压 - 阀值: 4.6V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: TO-236-3,SC-59,SOT-23-3
供应商设备封装: SOT-23-3
包装: 标准包装
其它名称: 1016-1601-6
S P 8 0 9 / S P 8 1 0
3 P i n M i c r o p r o c e s s o r S u p e r v i s o r C i r c u i t
THEORY OF OPERATION
μ P will be activated at a valid reset state.
These μ P supervisory circuits assert reset to
prevent code execution errors during power-
up, power-down, or brownout conditions.
Reset is guaranteed to be a logic low for
V TH >V CC >0.9V. Once V CC exceeded the reset
threshold, an internal timer keeps RESET low
for the reset timeout period; after this interval,
RESET goes high.
If a brownout condition occurs (V CC drops
below the reset threshold), RESET goes low.
Any time V CC goes below the reset threshold,
the internal timer resets to zero, and RESET
goes low. The internal timer is activated after
APPLICATION INFORMATION
N EGATIVE G OING V CC T RANSIENTS
In addition to issuing a reset to the μP during
power-up, power-down, and brownout
conditions, SP809 series are relatively
resistant to short-duration negative-going V CC
transient.
E NSURING A V ALID R ESET O UTPUT D OWN
TO V CC =0
When V CC falls below 0.9V, SP809 RESET
output no longer sinks current; it becomes an
open circuit. In this case, high-impedance
CMOS logic inputs connecting to RESET can
drift to undetermined voltages. Therefore,
SP809/810 with CMOS is perfect for most
applications of V CC down to 0.9V.
However in applications where RESET must be
valid down to 0V, adding a pull-down resistor
to RESET causes any leakage currents to flow
to ground, holding RESET low.
V CC returns above the reset threshold, and
RESET remains low for the reset timeout
period.
B ENEFIT OF H IGHLY A CCURATE R ESET
T HRESHOLD
SP809/810 with specified voltage as 5V±10%
or 3V±10% are ideal for systems using a
5V±5% or 3V±5% power supply. The reset is
guaranteed to assert after the power supply
falls below the minimum specified operating
voltage range of the system ICs. The pre-
trimmed thresholds are reducing the range
over which an undesirable reset may occur.
I NTERFACING TO μ P WITH B IDIRECTIONAL
R ESET P INS
The RESET output on the SP809N is open
drain, this device interfaces easily with μ Ps
that have bidirectional reset pins. Connecting
the μ P supervisor's RESET output directly to
the microcontroller's RESET pin with a single
pull-up resistor allows either device to assert
reset.
T EST C IRCUIT
Fig. 10: Test Circuit
? 2011 Exar Corporation
6/8
Rev. 2.0.0
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