参数资料
型号: SP813LCN-L
厂商: Exar Corporation
文件页数: 11/17页
文件大小: 0K
描述: IC MPU SUPERVISORY CIRC 8NSOIC
标准包装: 98
类型: 简单复位/加电复位
监视电压数目: 1
复位: 高有效
复位超时: 最小为 140 ms
电压 - 阀值: 4.65V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 管件
其它名称: SP813LCN-L-ND
S P 7 0 5 - S P 7 0 8 - S P 8 1 3 L
L o w P o w e r M i c r o p r o c e s s o r S u p e r v i s o r y C i r c u i t s
M ONITORING V OLTAGES O THER THAN THE
U NREGULATED DC I NPUT
Monitor voltages other than the unregulated
DC by connecting a voltage divider to PFI and
adjusting the ratio appropriately. If required,
add hysteresis by connecting a resistor (with a
the SP705-708/813L will keep RESET asserted
(where RESET = LOW and RESET = HIGH).
Note that this circuit's accuracy depends on
the PFI threshold tolerance, the V CC line, and
the resistors.
value approximately 10 times the sum of the
two resistors in the potential divider network)
between PFI and PFO . A capacitor between PFI
and GND will reduce the power-fail circuit's
sensitivity to high-frequency noise on the line
being monitored. RESET can be used to
monitor voltages other than the +5V V CC line.
Connect PFO to MR to initiate a RESET pulse
when PFI drops below 1.25V. Figure 21 shows
the SP705/706/707/708 configured to assert
RESET when the +5V supply falls below the
RESET threshold, or when the +12V supply
falls below approximately 11V.
Fig. 22: Monitoring a Negative Voltage Supply
I NTERFACING TO μ P S WITH B IDIRECTIONAL
RESET P INS
μPs with bidirectional RESET pins, such as the
Motorola 68HC11 series, can contend with the
SP705/706/707/708 RESET output. If, for
example, the RESET output is driven HIGH and
the μP wants to pull it LOW, indeterminate
logic levels may result. To correct this,
connect a 4.7K ? resistor between the RESET
output and the μP reset I/O, as shown if
Figure 23. Buffer the RESET output to other
system components.
Fig. 21: Monitoring +5V and +12V Power Supplies
M ONITORING A N EGATIVE V OLTAGE S UPPLY
The power-fail comparator can also monitor a
negative supply rail, shown in Figure 22. When
the negative rail is good (a negative voltage of
large magnitude), PFO is LOW. By adding the
resistors and transistor as shown, a HIGH PFO
triggers RESET. As long as PFO remains HIGH,
? 2010 Exar Corporation
11/17
Rev. 2.0.0
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