参数资料
型号: SPC560P50L5CEFB
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: MICROCONTROLLER, PQFP144
封装: ROHS COMPLIANT, LQFP-144
文件页数: 6/26页
文件大小: 509K
代理商: SPC560P50L5CEFB
SPC560P50x, SPC560P44x
A password mechanism is designed to grant the legitimate user access to the non volatile
memory.
Boot Assist Module (BAM)
The BAM is a block of read-only one-time programmed memory and is identical for all
SPC560Px devices that are based on the e200z0h core. The BAM program is executed
every time the device is powered-on if the alternate boot mode has been selected by the
user.
The BAM provides the following features:
Serial bootloading via FlexCAN or LINFlex or FlexRay.
BAM can accept a password via the used serial communication channel to grant the
legitimate user access to the non volatile memory.
3.3.17
Miscellaneous Control Module (MCM)
The MCM on this device features the following:
Platform configuration & revision
ECC error reporting for flash memory and SRAM
ECC error injection for RAM
3.3.18
CAN (FlexCAN)
The SPC560Px MCU contains one controller area network (FlexCAN) module. This module
is a communication controller implementing the CAN protocol according to Bosch
Specification version 2.0B. The CAN protocol was designed to be used primarily as a
vehicle serial data bus, meeting the specific requirements of this field: real-time processing,
reliable operation in the EMI environment of a vehicle, cost-effectiveness and required
bandwidth. FlexCAN module contains 32 message buffers.
The FlexCAN module provides the following features:
Full implementation of the CAN protocol specification, Version 2.0B
Standard data and remote frames
Extended data and remote frames
Zero to eight bytes data length
Programmable bit rate up to 1Mbit/s
32 message buffers of zero to eight bytes data length
Each message buffer configurable as Rx or Tx, all supporting standard and extended
messages
Programmable loop-back mode supporting self-test operation
Three programmable mask registers
Programmable transmit-first scheme: lowest ID or lowest buffer number
Time stamp based on 16-bit free-running timer
Global network time, synchronized by a specific message
Maskable interrupts
Independent of the transmission medium (an external transceiver is assumed)
High immunity to EMI
Short latency time due to an arbitration scheme for high-priority messages
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