Filterless High Efficiency
Mono 2.8 W Class-D Audio Amplifier
SSM2305
Rev. A
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FEATURES
Filterless Class-D amplifier with Σ-Δ modulation
No sync necessary when using multiple Class-D amplifiers
from Analog Devices, Inc.
2.8 W into 4 Ω load and 1.6 W into 8 Ω load at 5.0 V supply
with <10% total harmonic distortion (THD)
89% efficiency at 5.0 V, 1.3 W into 8 Ω speaker
>98 dB signal-to-noise ratio (SNR)
Single-supply operation from 2.5 V to 5.5 V
20 nA ultralow shutdown current
Short-circuit and thermal protection
Available in 8-lead, 3 mm × 3 mm LFCSP and MSOP
Pop-and-click suppression
Built-in resistors reduce board component count
Fixed and user-adjustable gain configurations
APPLICATIONS
Mobile phones
MP3 players
Portable gaming
Portable electronics
Educational toys
GENERAL DESCRIPTION
The SSM2305 is a fully integrated, high efficiency, Class-D
audio amplifier designed to maximize performance for mobile
phone applications. The application circuit requires a minimum
of external components and operates from a single 2.5 V to 5.5 V
supply. It is capable of delivering 2.2 W of continuous output
power with less than 1% THD + N driving a 4 Ω load from a
5.0 V supply. It has built-in thermal shutdown and output short-
circuit protection.
The SSM2305 features a high efficiency, low noise modulation
scheme that does not require external LC output filters. The modu-
lation provides high efficiency even at low output power. The
SSM2305 operates with 90% efficiency at 1.3 W into 8 Ω or 83%
efficiency at 2.2 W into 4 Ω from a 5.0 V supply and has an SNR of
>98 dB. Spread-spectrum pulse density modulation is used to
provide lower EMI-radiated emissions compared with other
Class-D architectures.
The SSM2305 has a micropower shutdown mode with a maximum
shutdown current of 30 nA. Shutdown is enabled by applying
a Logic 0 to the SD pin. The device also includes pop-and-click
suppression circuitry. This minimizes voltage glitches at the
output during turn-on and turn-off, thus reducing audible noise
on activation and deactivation.
The fully differential input of the SSM2305 provides excellent
rejection of common-mode noise on the input. Input coupling
capacitors can be omitted if the dc input common-mode voltage
is approximately VDD/2.
The SSM2305 has excellent rejection of power supply noise,
including noise caused by GSM transmission bursts and RF
rectification. PSRR is typically 60 dB at 217 Hz.
The default gain of the SSM2305 is 18 dB, but users can reduce the
gain by using a pair of external resistors.
The SSM2305 is specified over the commercial temperature range
(40°C to +85°C). It is available in both an 8-lead, 3 mm ×
3 mm lead frame chip scale package (LFCSP) and an 8-lead
mini small outline package (MSOP).
FUNCTIONAL BLOCK DIAGRAM
07
243
-00
1
SHUTDOWN
0.1F
VDD
POP/CLICK
SUPPRESSION
OUT+
OUT–
IN+
VBATT
2.5V TO 5.5V
IN–
MODULATOR
(Σ-Δ)
GND
10F
47nF*
*INPUT CAPACITORS ARE OPTIONAL IF INPUT DC COMMON-MODE VOLTAGE IS
APPROXIMATELY VDD/2.
47nF*
SD
AUDIO IN–
AUDIO IN+
SSM2305
37k
296k
37k
FET
DRIVER
BIAS
INTERNAL
OSCILLATOR
Figure 1.