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| 型号： | SSM2319CBZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 8/20页 |
| 文件大小： | 0K |
| 描述： | IC AMP AUDIO 3.7W MONO D 9WLCSP |
| 产品变化通告： | 8mm Carrier Tape Changes 28/Feb/2012 |
| 标准包装： | 10,000 |
| 类型： | D 类 |
| 输出类型： | 1-通道（单声道） |
| 在某负载时最大输出功率 x 通道数量： | 3.7W x 1 @ 3 欧姆 |
| 电源电压： | 2.5 V ~ 5.5 V |
| 特点： | 消除爆音，差分输入，短路和热保护，关闭 |
| 安装类型： | 表面贴装 |
| 供应商设备封装： | 9-WLCSP（1.52 x 1.69） |
| 封装/外壳： | 9-UFBGA，WLCSP |
| 包装： | 带卷 (TR) |
SSM2319
Rev. 0 | Page 16 of 20
Operating Modes
SYNCI = external clock. SYNCO is a buffered clock output
sourced from an external clock signal. One clock cycle after
the internal modulator detect signal is released, an irregular
pulse appears on MCLK before the first buffered output signal
begins on SYNCO, as shown in Figure 39.
The SYNC operating modes include the following:
Initial SYNC startup. An internal reference signal, REF, is
released after one complete internal clock cycle (MCLK).
After REF is released, another internal signal, MOD, waits
127 internal clock cycles. This operates as a training signal
to determine the SYNCI/SYNCO connection. During this
time, SYNCO is the internal clock signal.
07
55
0-
03
9
SD
REF
MOD
SYNCI
SYNCO
MCLK
INTERNAL
SIGNAL
SYNCI = CLKIN
SYNCI = GND or VDD. SYNCO stops generating pulses.
The modulator is controlled by an internal clock signal, as
shown in Figure 37.
07
55
0-
0
37
SD
REF
MOD
SYNCI
SYNCO
MCLK
INTERNAL
SIGNAL
SYNCI = GND
Figure 39. SYNCI = External Clock
SYNCI = GND, transitions to clock. When the SYNCI pin is
connected to GND first but then transitions to a clock signal,
SYNCO generates several internal clock signals before finally
being synchronized to the external clock signal, as shown
in Figure 40.
07
55
0-
04
0
SD
REF
MOD
SYNCI
SYNCO
MCLK
INTERNAL
SIGNAL
SYNCI = GND TO CLKIN
Figure 37. SYNCI = GND or VDD
SYNCI = SYNCO. SYNCO is the delayed clock signal of
SYNCI, as shown in Figure 38.
07
55
0-
0
3
8
SD
REF
MOD
SYNCI
SYNCO
MCLK
INTERNAL
SIGNAL
SYNCI = SYNCO
Figure 40. SYNCI = GND to Clock Input
SYNCI = CLK, transitions to GND. When SYNCI is
connected to a clock signal but then transitions to GND,
the SYNCO pin immediately stops generating a clock signal.
After a short clock loss detect time, the internal modulator
synchronizes to the internal clock signal, as shown
in Figure 41.
Figure 38. SYNCI = SYNCO
07
55
0-
0
41
SD
REF
MOD
SYNCI
SYNCO
MCLK
INTERNAL
SIGNAL
SYNCI = CLKIN TO GND
CLK LOSS
DETECT
Figure 41. SYNCI = Clock Input to GND
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| SSM2335CBZ-REEL7 | 功能描述:IC AMP AUDIO 4.28W MONO D 9WLCSP RoHS:是 类别:集成电路 (IC) >> 线性 - 音頻放大器 系列:- 标准包装:2,000 系列:- 类型:AB 类 输出类型:2 通道（立体声） 在某负载时最大输出功率 x 通道数量:- 电源电压:4 V ~ 18 V 特点:- 安装类型:通孔 供应商设备封装:8-DIP 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 |
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