参数资料
型号: SST25VF010A-33-4I-SAE-T
厂商: Microchip Technology
文件页数: 13/28页
文件大小: 0K
描述: IC FLASH SER 1MB 33MHZ SPI 8SOIC
标准包装: 3,300
系列: SST25
格式 - 存储器: 闪存
存储器类型: FLASH
存储容量: 1M (128K x 8)
速度: 33MHz
接口: SPI 串行
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
1 Mbit SPI Serial Flash
A Microchip Technology Company
SST25VF010A
Data Sheet
Auto Address Increment (AAI) Program
The AAI program instruction allows multiple bytes of data to be programmed without re-issuing the
next sequential address location. This feature decreases total programming time when the entire mem-
ory array is to be programmed. An AAI program instruction pointing to a protected memory area will be
ignored. The selected address range must be in the erased state (FFH) when initiating an AAI program
instruction.
Prior to any write operation, the Write-Enable (WREN) instruction must be executed. The AAI program
instruction is initiated by executing an 8-bit command, AFH, followed by address bits [A 23 -A 0 ]. Follow-
ing the addresses, the data is input sequentially from MSB (bit 7) to LSB (bit 0). CE# must be driven
high before the AAI program instruction is executed. The user must poll the BUSY bit in the software
status register or wait T BP for the completion of each internal self-timed Byte-Program cycle. Once the
device completes programming byte, the next sequential address may be program, enter the 8-bit
command, AFH, followed by the data to be programmed. When the last desired byte had been pro-
grammed, execute the Write-Disable (WRDI) instruction, 04H, to terminate AAI. After execution of the
WRDI command, the user must poll the Status register to ensure the device completes programming.
See Figure 7 for AAI programming sequence.
There is no wrap mode during AAI programming; once the highest unprotected memory address is
reached, the device will exit AAI operation and reset the Write-Enable-Latch bit (WEL = 0).
CE#
T BP
T B P
MODE 3
0 1 2 3 4 5 6 7 8
15 16
23 24
31 32 33 34 35 36 37 38 39
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0 1
SCK
MODE 0
SI
AF
A[23:16] A[15:8]
A[7:0]
Data Byte 1
AF
Data Byte 2
T BP
CE#
SCK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
SI
AF
Last Data Byte
04
05
SO
Write Disable (WRDI)
Instruction to terminate
AAI Operation
Read Status Register (RDSR)
Instruction to verify end of
AAI Operation
D OUT
1265 F07.0
Figure 7: Auto Address Increment (AAI) Program Sequence
?2011 Silicon Storage Technology, Inc.
13
S725081A
10/11
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