参数资料
型号: SST25WF020-40-5I-QAE-T
厂商: Microchip Technology
文件页数: 12/36页
文件大小: 0K
描述: IC FLASH SER 2MB 40MHZ SPI 8WSON
标准包装: 2,000
系列: SST25
格式 - 存储器: 闪存
存储器类型: FLASH
存储容量: 1M (128K x 8)
速度: 40MHz
接口: SPI 串行
电源电压: 1.65 V ~ 1.95 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-WDFN 裸露焊盘
供应商设备封装: 8-WSON
包装: 带卷 (TR)
512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit 1.8V SPI Serial Flash
A Microchip Technology Company
1.
2.
3.
4.
5.
SST25WF512 / SST25WF010 / SST25WF020 / SST25WF040
Data Sheet
One bus cycle is eight clock periods.
Address bits above the most significant bit of each density can be V IL or V IH .
4 KByte Sector-Erase addresses: use A MS -A 12, remaining addresses are don’t care but must be set either at V IL or V IH.
32 KByte Block-Erase addresses: use A MS -A 15, remaining addresses are don’t care but must be set either at V IL or V IH.
To continue programming to the next sequential address location, enter the 8-bit command, ADH, followed by 2 bytes of
data to be programmed. Data Byte 0 will be programmed into the initial address [A 23 -A 1 ] with A 0 =0, Data Byte 1 will be
programmed into the
initial address [A 23 -A 1 ] with A 0 = 1.
6. The Read-Status-Register is continuous with ongoing clock cycles until terminated by a low to high transition on CE#.
7. Either EWSR or WREN followed by WRSR will write to the Status register. The EWSR-WRSR sequence provides back-
ward compatibility to the SST25VF/LF series. The WREN-WRSR sequence is recommended for new designs.
8. Manufacturer’s ID is read with A 0 =0, and Device ID is read with A 0 =1. All other address bits are 00H. The Manufac-
turer’s ID and device ID output stream is continuous until terminated by a low-to-high transition on CE#.
Table 10: Device Operation Instructions for SST25WF020 AND SST25WF040
Address
Dummy
Data
Maximum
Instruction
Description
Op Code Cycle 1
Cycle(s) 2 Cycle(s) Cycle(s) Frequency
Read
Read Memory
0000 0011b (03H)
3
0
1 to ?
20 MHz
High-Speed Read Read Memory at Higher
0000 1011b (0BH)
3
1
1 to ?
Speed
4 KByte Sector-
Erase 4 KByte of memory
0010 0000b (20H)
3
0
0
Erase 3
array
32 KByte Block-
Erase 32 KByte block
0101 0010b (52H)
3
0
0
Erase 4
of memory array
64 KByte Block-
Erase 64 KByte block
1101 1000b (D8H)
3
0
0
Erase 5
of memory array
Chip-Erase
Erase Full Memory Array
0110 0000b (60H)
0
0
0
or
1100 0111b (C7H)
Byte-Program
To Program One Data Byte 0000 0010b (02H)
3
0
1
AAI-Word-Pro-
Auto Address Increment
1010 1101b (ADH)
3
0
2 to ?
gram 6
Programming
RDSR 7
Read-Status-Register
0000 0101b (05H)
0
0
1 to ?
40 MHz
EWSR 8
Enable-Write-Status-Regis- 0110 0000b (50H)
0
0
0
ter
WRSR
WREN 8
WRDI
RDID 9
Write-Status-Register
Write-Enable
Write-Disable
Read-ID
0000 0001b (01H)
0000 0110b (06H)
0000 0100b (04H)
1001 0000b (90H)
0
0
0
3
0
0
0
0
1
0
0
1 to ?
or
1010 1011b (ABH)
EBSY
Enable SO to output RY/
0111 0000b (70H)
0
0
0
BY# status during AAI pro-
gramming
DBSY
Disable SO to output RY/
1000 0000b (80H)
0
0
0
BY# status during AAI pro-
gramming
JEDEC-ID
JEDEC ID read
1001 1111b (9FH)
0
0
3 to ?
EHLD
Enable HOLD# pin function- 1010 1010b (AAH)
0
0
0
ality of the RST#/HOLD# pin
T10.0 25016
?2011 Silicon Storage Technology, Inc.
12
DS25016A
06/11
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