参数资料
型号: SST89E516RD2-33-C-PJ
厂商: Silicon Storage Technology, Inc.
英文描述: FlashFlex51 MCU
中文描述: FlashFlex51单片机
文件页数: 53/91页
文件大小: 984K
代理商: SST89E516RD2-33-C-PJ
Preliminary Specifications
FlashFlex51 MCU
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2
53
2004 Silicon Storage Technology, Inc.
S71255-00-000
3/04
8.3 Compare/Capture Modules
Each PCA module has an associated SFR with it. These
registers are: CCAPM0 for module 0, CCAPM1 for module
1, etc. Refer to “PCA Compare/Capture Module Mode Reg-
ister (CCAPMn)” on page 29 for details. The registers each
contain 7 bits which are used to control the mode each
module will operate in. The ECCF bit (CCAPMn.0 where n
= 0, 1, 2, 3, or 4 depending on module) will enable the CCF
flag in the CCON SFR to generate an interrupt when a
match or compare occurs. PWM (CCAPMn.1) enables the
pulse width modulation mode. The TOG bit (CCAPMn.2)
when set, causes the CEX output associated with the mod-
ule to toggle when there is a match between the PCA
counter and the module’s capture/compare register. When
there is a match between the PCA counter and the mod-
ule’s capture/compare register, the MATn (CCAPMn.3) and
the CCFn bit in the CCON register to be set.
Bits CAPN (CCAPMn.4) and CAPP (CCAPMn.5) deter-
mine whether the capture input will be active on a positive
edge or negative edge. The CAPN bit enables the negative
edge that a capture input will be active on, and the CAPP
bit enables the positive edge. When both bits are set, both
edges will be enabled and a capture will occur for either
transition. The last bit in the register ECOM (CCAPMn.6)
when set, enables the comparator function. Table 8-5
shows the CCAPMn settings for the various PCA functions.
There are two additional register associated with each of
the PCA modules: CCAPnH and CCAPnL. They are regis-
ters that hold the 16-bit count value when a capture occurs
or a compare occurs. When a module is used in PWM
mode, these registers are used to control the duty cycle of
the output. See Figure 8-1.
TABLE
8-4: PCA H
IGH
AND
L
OW
R
EGISTER
C
OMPARE
/C
APTURE
M
ODULES
Symbol
CCAP0H PCA Module 0
Compare/Capture
Registers
CCAP1H PCA Module 1
Compare/Capture
Registers
CCAP2H PCA Module 2
Compare/Capture
Registers
CCAP3H PCA Module 3
Compare/Capture
Registers
CCAP4H PCA Module 4
Compare/Capture
Registers
Description
Direct
Address
FAH
EAH
Bit Address, Symbol, or Alternative Port Function
RESET
Value
00H
00H
MSB
LSB
CCAP0H[7:0]
CCAP0L[7:0]
CCAP0L
FBH
EBH
CCAP1H[7:0]
CCAP1L[7:0]
00H
00H
CCAP1L
FCH
ECH
CCAP2H[7:0]
CCAP2L[7:0]
00H
00H
CCAP2L
FDH
EDH
CCAP3H[7:0]
CCAP3L[7:0]
00H
00H
CCAP3L
FEH
EEH
CCAP4H[7:0]
CCAP4L[7:0]
00H
00H
CCAP4L
T8-4.0 1255
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