参数资料
型号: SST89E554A-40-I-TQJ
厂商: SILICON STORAGE TECHNOLOGY INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP44
封装: MS-026ACB, TQFP-44
文件页数: 29/87页
文件大小: 996K
代理商: SST89E554A-40-I-TQJ
Preliminary Specifications
FlashFlex51 MCU
SST89E554A / SST89V554A
35
2003 Silicon Storage Technology, Inc.
S71228-00-000
6/03
4.1.1 Product Identification
The Read-ID command accesses the Signature Bytes that
identify the device and the manufacturer as SST. External
programmers primarily use these Signature Bytes in the
selection of programming algorithms. The Read-ID com-
mand is selected by the command code of 0H on P3[7:6]
and P2[7:6]. See Figure 14-14 for timing waveforms.
4.1.2 Arming Command
An arming command sequence must take place before
any external host mode sequence command is recognized
by the device. This prevents accidental triggering of exter-
nal host mode commands due to noise or programmer
error. The arming command is as follows:
1. PSEN# goes low while RST is high. This will get
the machine in external host mode, re-configuring
the pins, and turning on the on-chip oscillator.
2. A Read-ID command is issued, and after 1 ms the
external host mode commands can be issued.
After the above sequence, all other external host mode
commands are enabled. Before the Read-ID command is
received, all other external host mode commands received
are ignored.
4.1.3 External Host Mode Commands
The external host mode commands are Read-ID, Chip-
Erase, Block-Erase, Sector-Erase, Byte-Program, Byte-
Verify, Prog-SB1, Prog-SB2, Prog-SB3, Prog-SC0, Prog-
SC1, Select-Block0, Select-Block1. See Table 4-1 for all
signal logic assignments, Figure 4-1 for I/O pin assign-
ments, and Table 14-11 for the timing parameters. The criti-
cal timing for all Erase and Program commands is
generated by an on-chip flash memory controller. The high-
to-low transition of the PROG# signal initiates the Erase or
Program commands, which are synchronized internally.
The Read commands are asynchronous reads, indepen-
dent of the PROG# signal level.
A detailed description of the external host mode com-
mands follows.
The Chip-Erase, Block-Erase, and Sector-Erase com-
mands are used for erasing all or part of the memory array.
Erased data bytes in the memory array will be erased to
FFH. Memory locations that are to be programmed must
be in the erased state prior to programming.
The Chip-Erase command erases all bytes in both memory
blocks, regardless of any previous Select-Block0 or Select-
Block1 commands. Chip-Erase ignores the Security Lock
status and will erase the Security Lock, returning the device
to its Unlocked state. The Chip-Erase command will also
erase the SC0 bit. Upon completion of the Chip-Erase
command, Block 1 will be the selected block. See Figure
14-15 for timing waveforms.
The Block-Erase command erases all bytes in the selected
memory blocks. This command will not be executed if the
security lock is enabled. The selection of the memory block
to be erased is determined by the prior execution Select-
Block0 or Select-Block1 command. See Figure 14-16 for
the timing waveforms.
The Sector-Erase command erases all of the bytes in a
sector. The sector size for the flash memory is 128 Bytes.
This command will not be executed if the Security lock is
enabled. See Figure 14-17 for timing waveforms.
The Byte-Program command is used for programming new
data into the memory array. Programming will not take
place if any security locks are enabled. See Figure 14-18
for timing waveforms.
The Byte-Verify command allows the user to verify that the
device correctly performed an Erase or Program com-
mand. This command will be disabled if any security locks
are enabled. See Figure 14-21 for timing waveforms.
The Prog-SB1, Prog-SB2, Prog-SB3 commands program
the security bits, the functions of these bits are described in
the Security Lock section and also in Table 9-1. Once pro-
grammed, these bits can only be erased through a Chip-
Erase command. See Figure 14-19 for timing waveforms.
Prog-SC0 command programs SC0 bit, which determines
the state of SFCF[0] out of reset. Once programmed, SC0
can only be restored to an erased state via a Chip-Erase
command. See Figure 14-20 for timing waveforms.
Prog-SC1 command programs SC1 bit, which determines
the state of SFCF[1] out of reset. Once programmed, SC1
can only be restored to an erased state via a Chip-Erase
command. See Figure 14-20 for timing waveforms.
TABLE
4-2: PRODUCT IDENTIFICATION
Address
Data
Manufacturer’s ID
30H
BFH
Device ID
SST89E554A
31H
9BH
SST89V554A
31H
9AH
T4-2.0 1228
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