参数资料
型号: SST89V54RD-33-C-PIE
厂商: Microchip Technology
文件页数: 13/92页
文件大小: 0K
描述: IC MCU 8BIT 24KB FLASH 40PDIP
标准包装: 9
系列: FlashFlex®
核心处理器: 8051
芯体尺寸: 8-位
速度: 33MHz
连通性: EBI/EMI,SPI,UART/USART
外围设备: 欠压检测/复位,POR,WDT
输入/输出数: 32
程序存储器容量: 16KB(16K x 8)
程序存储器类型: 闪存
EEPROM 大小: 8K x 8
RAM 容量: 1K x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 3.6 V
振荡器型: 外部
工作温度: 0°C ~ 70°C
封装/外壳: 40-DIP(0.600",15.24mm)
包装: 管件
2011 Silicon Storage Technology, Inc.
DS25087A
10/11
20
FlashFlex MCU
SST89V54RD2/RD / SST89V58RD2/RD
Not Recommended for New Designs
A Microchip Technology Company
Symbol
Function
IAPEN
Enable IAP operation
0: IAP commands are disabled
1: IAP commands are enabled
SWR
Software Reset
See Section , “Software Reset”
BSEL
Program memory block switching bit
See Figures 5 and 6 and Table 3
Symbol
Function
FIE
Flash Interrupt Enable.
0: INT1# is not reassigned.
1: INT1# is re-assigned to signal IAP operation completion.
External INT1# interrupts are ignored.
FCM[6:0]
Flash operation command
000_0001b
Chip-Erase
000_1011bSector-Erase
000_1101bBlock-Erase
000_1100bByte-Verify1
000_1110bByte-Program
000_1111bProg-SB1
000_0011bProg-SB2
000_0101bProg-SB3
000_1001bProg-SC0
000_1001bProg-SC1
000_1000bEnable-Clock-Double
All other combinations are not implemented, and reserved for future use.
1. Byte-Verify has a single machine cycle latency and will not generate any INT1# interrupt regardless of FIE.
Symbol
Function
SFAL
Mailbox register for interfacing with flash memory block. (Low order address register).
SuperFlash Configuration Register (SFCF)
Location
76
54
32
10
Reset
Value
B1H
-
IAPEN
-
SWR
BSEL
x0xxxx00b
SuperFlash Command Register (SFCM)
Location
7654
3210
Reset
Value
B2H
FIE
FCM6
FCM5
FCM4
FCM3
FCM2
FCM1
FCM0
00H
SuperFlash Address Registers (SFAL)
Location
7654
3210
Reset
Value
B3H
SuperFlash Low Order Byte Address Register
00H
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