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参数资料
| 型号： | ST16C2450CQ-0A-EB |
| 厂商： | Exar Corporation |
| 文件页数： | 9/30页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR ST16C2450 48TQFP |
| 标准包装： | 1 |
| 系列： | * |
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xr
ST16C2450
REV. 4.0.1
2.97V TO 5.5V DUART
17
LSR[2]: Receive Data Parity Error Flag
Logic 0 = No parity error (default).
Logic 1 = Parity error. The receive character in RHR does not have correct parity information and is suspect.
This error is associated with the character available for reading in RHR. If the LSR interrupt is enabled (IER
bit-2), an interrupt will be generated when the character is in the RHR.
LSR[3]: Receive Data Framing Error Flag
Logic 0 = No framing error (default).
Logic 1 = Framing error. The receive character did not have a valid stop bit(s). This error is associated with
the character available for reading in RHR. If the LSR interrupt is enabled (IER bit-2), an interrupt will be
generated when the character is in the RHR.
LSR[4]: Receive Break Flag
Logic 0 = No break condition (default).
Logic 1 = The receiver received a break signal (RX was a logic 0 for at least one character frame time). The
break indication remains until the RX input returns to the idle condition, “mark” or logic 1. If the LSR interrupt
is enabled (IER bit-2), an interrupt will be generated when the character is in the RHR.
LSR[5]: Transmit Holding Register Empty Flag
This bit is the Transmit Holding Register Empty indicator. This bit indicates that the transmitter is ready to
accept a new character for transmission. In addition, this bit causes the UART to issue an interrupt to the host
when the THR interrupt enable is set. The THR bit is set to a logic 1 when the data byte is transferred from the
transmit holding register to the transmit shift register. The bit is reset to logic 0 concurrently with the data
loading to the transmit holding register by the host.
LSR[6]: THR and TSR Empty Flag
This bit is set to a logic 1 whenever the transmitter goes idle. It is set to logic 0 whenever either the THR or
TSR contains a data character.
LSR[7]: Reserved
4.8
Modem Status Register (MSR) - Read Only
This register provides the current state of the modem interface signals, or other peripheral device that the
UART is connected. Lower four bits of this register are used to indicate the changed information. These bits
are set to a logic 1 whenever a signal from the modem changes state. These bits may be used as general
purpose inputs/outputs when they are not used with modem signals.
MSR[0]: Delta CTS# Input Flag
Logic 0 = No change on CTS# input (default).
Logic 1 = The CTS# input has changed state since the last time it was monitored. A modem status interrupt
will be generated if MSR interrupt is enabled (IER bit-3).
MSR[1]: Delta DSR# Input Flag
Logic 0 = No change on DSR# input (default).
Logic 1 = The DSR# input has changed state since the last time it was monitored. A modem status interrupt
will be generated if MSR interrupt is enabled (IER bit-3).
MSR[2]: Delta RI# Input Flag
Logic 0 = No change on RI# input (default).
Logic 1 = The RI# input has changed from a logic 0 to a logic 1, ending of the ringing signal. A modem status
interrupt will be generated if MSR interrupt is enabled (IER bit-3).
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ST16C2450CQ-0B-EB | 功能描述:界面开发工具 Supports C2450 48 ld TQFP, PCI Interface RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| ST16C2450CQ48 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
| ST16C2450CQ48-F | 功能描述:UART 接口集成电路 DUAL UART RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| ST16C2450CQ48TR-F | 制造商:Exar Corporation 功能描述:UART 2-CH 1Byte FIFO 3.3V/5V 48-Pin TQFP T/R 制造商:Exar Corporation 功能描述:ST16C2450CQ48TR-F |
| ST16C2450IJ44 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
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