参数资料
| 型号： | ST16C550CQ48-F |
| 厂商： | Exar Corporation |
| 文件页数： | 3/35页 |
| 文件大小： | 0K |
| 描述： | IC UART FIFO 16B SGL 48TQFP |
| 标准包装： | 250 |
| 特点： | * |
| 通道数： | 1，UART |
| FIFO's： | 16 字节 |
| 电源电压： | 2.97 V ~ 5.5 V |
| 带故障启动位检测功能： | 是 |
| 带调制解调器控制功能： | 是 |
| 带CMOS： | 是 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TQFP |
| 供应商设备封装： | 48-TQFP（7x7） |
| 包装： | 托盘 |
| 其它名称： | 1016-1260 |
第1页第2页当前第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页
ST16C550
11
Rev. 5.01
DMA Operation
The ST16C550 FIFO trigger level provides additional
flexibility to the user for block mode operation. The user
can optionally operate the transmit and receive FIFO’s
in the DMA mode (FCR bit-3). The DMA mode affects
the state of the -RXRDY and -TXRDY output pins. The
following tables show this:
-RXRDY pin:
Non-DMA mode
DMA mode
1 = FIFO empty
0 to 1 transition when FIFO
empties
0 = at least 1 byte
1 to 0 transition when FIFO
in FIFO
reaches trigger level, or
timeout occurs
-TXRDYpin:
Non-DMA mode
DMA mode
1 = at least 1 byte
1 = FIFO is full
in FIFO
0 = FIFO empty
0 = FIFO has at least 1
empty location
Loop-back Mode
The internal loop-back capability allows onboard diag-
nostics. In the loop-back mode the normal modem
interface pins are disconnected and reconfigured for
loop-back internally. In this mode MSR bits 4-7 are
also disconnected. However, MCR register bits 0-3
can be used for controlling loop-back diagnostic test-
ing. In the loop-back mode -OP1 and -OP2 in the MCR
register (bits 0-1) control the modem -RI and -CD
inputs respectively. MCR signals -DTR and -RTS (bits
0-1) are used to control the modem -CTS and -DSR
inputs respectively. The transmitter output (TX) and the
receiver input (RX) are disconnected from their associ-
ated interface pins, and instead are connected together
internally (See Figure 4). The -CTS, -DSR, -CD, and -RI
are disconnected from their normal modem control
inputs pins, and instead are connected internally to -
DTR, -RTS, -OP1 and -OP2. Loop-back test data is
entered into the transmit holding register via the user
data bus interface, D0-D7. The transmit UART serial-
izes the data and passes the serial data to the receive
UART via the internal loop-back connection. The receive
UART converts the serial data back into parallel data
that is then made available at the user data interface,
D0-D7. The user optionally compares the received
data to the initial transmitted data for verifying error
free operation of the UART TX/RX circuits.
In this mode , the receiver and transmitter interrupts are
fully operational. The Modem Control Interrupts are also
operational. The interrupts are still controlled by the
IER.
Figure 3, TYPICAL EXTERNAL CRYSTAL OSCIL-
LATOR CONNECTION
C1
22-47pF
C2
22-47pF
Y1
1.8432 - 24 MHz
R1
0-120
(Optional)
R2
1M
XTAL1
XTAL2
相关PDF资料 |
PDF描述 |
|---|---|
| MAX7312AUG+T | IC I/O EXPANDER I2C 16B 24TSSOP |
| MAX7312ATG+T | IC I/O EXPANDER I2C 16B 24TQFN |
| XR16M890IM48-F | IC UART TXRX 128 BYTE 48TQFP |
| XR16M781IL24-F | IC UART FIFO 64B 24QFN |
| XR16M781IB25-F | IC UART FIFO 64B 25BGA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ST16C550CQ48TR-F | 功能描述:UART 接口集成电路 UART RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| ST16C550IJ44 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
| ST16C550IJ44-F | 功能描述:UART 接口集成电路 2.97V-5.5V 16B FIFO temp -45 to 85C;UART RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| ST16C550IJ44TR-F | 功能描述:UART 接口集成电路 UART RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| ST16C550IP40 | 功能描述:UART 接口集成电路 SINGLE UART W/16 BYTE FIFO RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
发布紧急采购，3分钟左右您将得到回复。