参数资料
| 型号： | ST16C552IJ68-F |
| 厂商： | Exar Corporation |
| 文件页数： | 35/39页 |
| 文件大小： | 0K |
| 描述： | IC UART FIFO 16B DUAL 68PLCC |
| 标准包装： | 19 |
| 特点： | * |
| 通道数： | 2，DUART |
| FIFO's： | 16 字节 |
| 规程： | 打印机 |
| 电源电压： | 2.97 V ~ 5.5 V |
| 带并行端口： | 是 |
| 带故障启动位检测功能： | 是 |
| 带调制解调器控制功能： | 是 |
| 带CMOS： | 是 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 68-LCC（J 形引线） |
| 供应商设备封装： | 68-PLCC |
| 包装： | 管件 |
| 其它名称： | 1016-1664 ST16C552IJ68-F-ND |
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5
ST16C552/552A
Rev. 3.40
SYMBOL DESCRIPTION
Symbol
Pin
Signal Type
Pin Description
trailing edge of -IOR (end of the external CPU read cycle).
-IOR
37
I
Read strobe.- A logic 0 transition on this pin will place the
contents of an Internal register defined by address bits A0-
A2 for either UART channels A/B or A0-A1 for the printer
port, onto D0-D7 data bus for a read cycle by an external
CPU.
-IOW
36
I
Write strobe.- A logic 0 transition on this pin will transfer the
data on the internal data bus (D0-D7), as defined by either
address bits A0-A2 for UART channels A/B or A0-A1 for the
printer port, into an internal register during a write cycle from
an external CPU.
PD7-PD0
46-53
I/O
Printer Data port (Bi-directional three state) - These pins are
the eight bit, three state data bus for transferring information
to or from an external device (usually a printer). D0 is the
least significant bit. PD7-PD0 are latched during a write
cycle (output mode).
PE
67
I
Paper Empty - General purpose input or line printer paper
empty (Internal pull-up). This pin can be connected to
provide a printer out of paper indication.
RDOUT
44
O
Read Out (active high) - This pin goes to a logic 1 when the
external CPU is reading data from the 552/552A. This signal
can be used to enable/disable external transceivers or other
logic functions.
-RESET
39
I
Master Reset (active low) - a logic 0 on this pin will reset the
internal registers and all the outputs. The UART transmitter
output and the receiver input will be disabled during reset
time. (See ST16C552/552A External Reset Conditions for
initialization details.)
-RXRDY A/B
9,61
O
Receive Ready A/B (active low). This function is associated
with the dual channel UARTs and provide the RX FIFO/
RHR status for individual receive channels (A-B). A logic 0
indicates there is receive data to read/unload, i.e., receive
ready status with one or more RX characters available in the
FIFO/RHR. This pin is a logic 1 when the FIFO/RHR is
empty or when the programmed trigger level has not been
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ST16C552IJ68TR-F | 功能描述:UART 接口集成电路 DUAL UART W/16BYTE FIFO&PARALELPRNTPORT RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| ST16C554 | 制造商:EXAR 制造商全称:EXAR 功能描述:2.97V TO 5.5V QUAD UART WITH 16-BYTE FIFO |
| ST16C554CJ-0A-EVB | 功能描述:界面开发工具 Supports C554D 68 ld PLCC, ISA Interface RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| ST16C554CQ-0A-EVB | 功能描述:界面开发工具 Supports C554 64 ld TQFP, ISA Interface RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| ST16C554CQ64 | 制造商:EXAR 制造商全称:EXAR 功能描述:2.97V TO 5.5V QUAD UART WITH 16-BYTE FIFO |
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