参数资料
型号: ST52F510GmB6
厂商: 意法半导体
英文描述: 8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI
中文描述: 8位重症监护病房智能控制单元两个定时器/的PWM,模数转换器,I2C,SPI和脊髓损伤
文件页数: 49/106页
文件大小: 1340K
代理商: ST52F510GMB6
ST52F510/F513/F514
49/106
Internal Oscillator Calibration (OSC_SET)
Option Byte 2 (02h)
Reset Value: 0001 0100 (14h)
Bit 7-6: Not Used
Bit 5-0:
OSPAR5-0
Internal Oscillator Parameters
These bits are used in order to calibrate the
precision of the internal oscillator working
at 10 MHz. The six bits enable some
current generators with steps of 0.05
μ
A
corresponding to interval of frequency of
100KHz
.
Warning:
the maximum configuration value
allowed is 101000 (40). The value coresponding to
the 10 MHz by design is 010100 (20).
PLVD Control Register (PLVD_CR)
Option Byte 3 (03h)
Reset Value: 0000 0010 (02h)
Bit 7-2: Not Used
Bit 1-0:
PLVD1-0
PLVD detection levels
00: PLVD disabled
01: Medium detection level
10: Lowest detection level
11: Highest detection level
Wake-Up Time Prescaler (WAKEUP)
Option Byte 7 (07h)
Reset Value: 0000 0000 (00h)
Bit 7-0:
WK7-0
Wake-up prescaler
This byte determinates the time delay for
the stabilization of the oscillator after an
External Reset or a POR and after the
wake-up from Halt. The time delay is
computed according to the following
formula:
Warning:
If the internal clock is used as clock
source the prescaler is not used.
Table 6.2 Recomended Gains for the most common frequencies
Frequency
Recommend
Gain Stages
CKPAR2-0
Oscillation
Start Times
Settling Times for
40% duty-cycle
External Clock
0
000
-
-
1 MHz
1
001
367
μ
s
27
μ
s
4 MHz
1
001
84
μ
s
10
μ
s
8 MHz
3
011
75
μ
s
9
μ
s
10 MHz
3
011
79
μ
s
5
μ
s
12 MHz
6
101
110
μ
s
8
μ
s
16 MHz
6
101
352
μ
s
7
μ
s
20 MHz
8
111
165
μ
s
11
μ
s
(1) The recommended values have been chosen to have the best tradeoff beetwen start time and current
consumption. Higher gains give shorter Start times; lower gains give less current consumption.
(2) Indicative values by design at 25° Celsius, V
DD
=2.6 V. Not Tested in production.
7
0
-
-
OSPAR5 OSPAR4 OSPAR3 OSPAR2 OSPAR1 OSPAR0
7
0
-
-
-
-
-
-
PLVD1
PLVD0
7
0
WK7
WK6
WK5
WK4
WK3
WK2
WK1
WK0
Delay
4096
WAKEUP
1
+
(
)
Tclk
×
×
=
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