参数资料
型号: ST6242BQ1/XXX
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP64
封装: PLASTIC, QFP-64
文件页数: 56/69页
文件大小: 1846K
代理商: ST6242BQ1/XXX
Obsolete
Product(s)
- Obsolete
Product(s)
Obsolete
Product(s)
- Obsolete
Product(s)
6/69
ST62T42B/E42B
1.2 PIN DESCRIPTIONS
VDD and VSS. Power is supplied to the MCU via
these two pins. VDD is the power connection and
VSS is the ground connection.
OSCin and OSCout. These pins are internally
connected to the on-chip oscillator circuit. A quartz
crystal, a ceramic resonator or an external clock
signal can be connected between these two pins.
The OSCin pin is the input pin, the OSCout pin is
the output pin.
RESET. The active-low RESET pin is used to re-
start the microcontroller.
TEST/V
PP. The TEST must be held at VSS for nor-
mal operation (an internal pull-down resistor se-
lects normal operating mode if TEST pin is not
connected). If TEST pin is connected to a +12.5V
level during the reset phase, the EPROM/OTP
programming Mode is entered.
NMI. The NMI pin provides the capability for asyn-
chronous interruption, by applying an external non
maskable interrupt to the MCU. The NMI input is
falling edge sensitive with Schmitt trigger charac-
teristics. The user can select as option the availa-
bility of an on-chip pull-up at this pin.
PA4-PA7. These 4 lines are organised as one I/O
port (A). Each line may be configured under soft-
ware control as input with or without internal pull-
up resistors, input with interrupt generation and
pull-up resistor, open-drain or push-pull outputs, or
as analog inputs for the A/D converter.
PB2...PB7. These 6 lines are organised as one I/O
port (B). Each line may be configured under soft-
ware control as input with or without internal pull-
up resistors, input with interrupt generation and
pull-up resistor, open-drain or push-pull output or
as analog input for the A/D converter. PB0..PB3
can be used as analog inputs for the A/D con-
verter, while PB7/Sout, PB6/Sin and PB5/Scl can
be used respectively as data out, data in and
Clock pins for the on-chip SPI. In addition,
PB4..PB7 can sink 20mA for direct LED or TRIAC
drive.
PC0-PC7. These 8 lines are organised as one I/O
port (C). Each line may be configured under soft-
ware control as input with or without internal pull-
up resistor, input with interrupt generation and
pull-up resistor, open-drain or push-pull output, or
as LCD segment output S33..S40.
COM1-COM4. These four pins are the LCD pe-
ripheral common outputs. They are the outputs of
the on-chip backplane voltage generator which is
used for multiplexing the 45 LCD lines allowing up
to 180 segments to be driven.
S9-S48. These pins are the 40 LCD peripheral
segment outputs. S33..S40 are alternate functions
of the Port C I/O pins. (Combiports feature)
VLCD. Display voltage supply. It determines the
high voltage level on COM1-COM4 and S4-S48
pins.
VLCD1/3, VLCD2/3. Display supply voltage inputs
for determining the display voltage levels on
COM1-COM4 and S4-S48 pins during multiplex
operation.
6
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