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参数资料
型号： ST72F324J2
英文描述： 8-BIT MCU WITH NESTED INTERRUPTS. FLASH. 10-BIT ADC. 4 TIMERS. SPI. SCI INTERFACE
中文描述： 8位微控制器嵌套中断。闪光。 10位ADC。 4定时器。的SPI。 SCI接口
文件页数： 83/161页
文件大小： 2070K
代理商： ST72F324J2
ST72324
28/161
SYSTEM INTEGRITY MANAGEMENT (Cont’d)
6.4.2 Auxiliary Voltage Detector (AVD)
The Voltage Detector function (AVD) is based on
an analog comparison between a VIT-(AVD) and
VIT+(AVD) reference value and the VDD main sup-
ply. The VIT- reference value for falling voltage is
lower than the VIT+ reference value for rising volt-
age in order to avoid parasitic detection (hystere-
sis).
The output of the AVD comparator is directly read-
able by the application software through a real
time status bit (AVDF) in the SICSR register. This
bit is read only.
Caution: The AVD function is active only if the
LVD is enabled through the option byte.
6.4.2.1 Monitoring the VDD Main Supply
The AVD voltage threshold value is relative to the
selected LVD threshold configured by option byte
(see Section 14.1 on page 149).
If the AVD interrupt is enabled, an interrupt is gen-
erated when the voltage crosses the VIT+(AVD) or
VIT-(AVD) threshold (AVDF bit toggles).
In the case of a drop in voltage, the AVD interrupt
acts as an early warning, allowing software to shut
down safely before the LVD resets the microcon-
troller. See Figure 16.
The interrupt on the rising edge is used to inform
the application that the VDD warning state is over.
If the voltage rise time trv is less than 256 or 4096
CPU cycles (depending on the reset delay select-
ed by option byte), no AVD interrupt will be gener-
ated when VIT+(AVD) is reached.
If trv is greater than 256 or 4096 cycles then:
– If the AVD interrupt is enabled before the
VIT+(AVD) threshold is reached, then 2 AVD inter-
rupts will be received: the first when the AVDIE
bit is set, and the second when the threshold is
reached.
– If the AVD interrupt is enabled after the VIT+(AVD)
threshold is reached then only one AVD interrupt
will occur.
Figure 16. Using the AVD to Monitor VDD
VDD
VIT+(AVD)
VIT-(AVD)
AVDF bit
0
RESET VALUE
IF AVDIE bit = 1
Vhyst
AVD INTERRUPT
REQUEST
INTERRUPT PROCESS
VIT+(LVD)
VIT-(LVD)
LVD RESET
Early Warning Interrupt
(Power has dropped, MCU not
not yet in reset)
1
trv VOLTAGE RISE TIME
相关PDF资料
PDF描述
ST72F324J4 8-BIT MCU WITH NESTED INTERRUPTS. FLASH. 10-BIT ADC. 4 TIMERS. SPI. SCI INTERFACE
ST72F324J6 8-BIT MCU WITH NESTED INTERRUPTS. FLASH. 10-BIT ADC. 4 TIMERS. SPI. SCI INTERFACE
ST72F324K2 8-BIT MCU WITH NESTED INTERRUPTS. FLASH. 10-BIT ADC. 4 TIMERS. SPI. SCI INTERFACE
ST72F324K4 64Mb EDO/FPM - OBSOLETE
ST72F324K6 64Mb EDO/FPM - OBSOLETE
相关代理商/技术参数
参数描述
ST72F324J2B6 制造商:STMicroelectronics 功能描述:
ST72F324J2T6 功能描述:8位微控制器 -MCU Flash 8K SPI/SCI RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
ST72F324J2T6TR 功能描述:8位微控制器 -MCU 5V RANGE 8B MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
ST72F324J2TA 功能描述:8位微控制器 -MCU AUTO 8BIT MICRO RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
ST72F324J2TAE 功能描述:8位微控制器 -MCU 5V RANGE 8B MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
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