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参数资料
型号： ST72F324K4B5
厂商： STMICROELECTRONICS
元件分类： 微控制器/微处理器
英文描述： 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP32
封装： 0.400 INCH, ROHS COMPLIANT, SHRINK, PLASTIC, DIP-32
文件页数： 70/164页
文件大小： 2897K
代理商： ST72F324K4B5
ST72324Jx ST72324Kx
161/164
JP while_loop
.call_routine
; entry to call_routine
PUSH A
PUSH X
PUSH CC
.ext1_rt
; entry to interrupt routine
LD A,#$00
LD sema,A
IRET
15.1.7 16-bit Timer PWM Mode
In PWM mode, the first PWM pulse is missed after
writing the value FFFCh in the OC1R register
(OC1HR, OC1LR). It leads to either full or no PWM
during a period, depending on the OLVL1 and
OLVL2 settings.
15.1.8 SCI Wrong Break duration
Description
A single break character is sent by setting and re-
setting the SBK bit in the SCICR2 register. In
some cases, the break character may have a long-
er duration than expected:
- 20 bits instead of 10 bits if M=0
- 22 bits instead of 11 bits if M=1.
In the same way, as long as the SBK bit is set,
break characters are sent to the TDO pin. This
may lead to generate one break more than expect-
ed.
Occurrence
The occurrence of the problem is random and pro-
portional to the baudrate. With a transmit frequen-
cy
of
19200
baud
(fCPU=8MHz
and
SCI-
BRR=0xC9), the wrong break duration occurrence
is around 1%.
Workaround
If this wrong duration is not compliant with the
communication protocol in the application, soft-
ware can request that an Idle line be generated
before the break character. In this case, the break
duration is always correct assuming the applica-
tion is not doing anything between the idle and the
break. This can be ensured by temporarily disa-
bling interrupts.
The exact sequence is:
- Disable interrupts
- Reset and Set TE (IDLE request)
- Set and Reset SBK (Break Request)
- Re-enable interrupts
15.2 FLASH DEVICES ONLY
15.2.1 Internal RC Operation
In ST72F324J and ST72F324K devices, the inter-
nal RC oscillator is not supported if the LVD is dis-
abled.
1
相关PDF资料
PDF描述
ST72F324K6B5 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP32
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相关代理商/技术参数
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