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参数资料
| 型号： | ST72F651R6T1E |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, MICROCONTROLLER, PQFP64 |
| 封装： | 14 X 14 MM, TQFP-64 |
| 文件页数： | 7/10页 |
| 文件大小： | 87K |
| 代理商： | ST72F651R6T1E |
ST7265x
6/10
PIN DESCRIPTION (Cont’d)
Legend / Abbreviations:
Type: I = input, O = output, S = supply
VDDF powered: I/O powered by the alternate sup-
ply rail, supplied by VDDF and VSSF.
In/Output level: CT = CMOS 0.3VDD/0.7VDD with
input trigger
Output level: HS = High Sink (on N-buffer only)
Port and control configuration:
– Input:float = floating, wpu = weak pull-up, int = in-
terrupt
– Output: OD = open drain, T = true open drain, PP
= push-pull, OP = pull-up enabled by option byte.
The RESET configuration of each pin is shown in
bold.
Table 1. Device Pin Description
Pin
Pin Name
Type
V
DDF
Powered
Level
Port / Control
Main
Functio n
(after reset)
Alternate Functio n
TQFP64
Input
Output
Input
Output
float
wpu
int
OD
PP
1
USBVSS
S
USB Digital ground
2
USBDM
I/O
USB bidirectional data (data -)
3
USBDP
I/O
USB bidirectional data (data +)
4
USBVCC
O
USB power supply, output by the on-chip USB
3.3V linear regulator.
Note: An external decoupling capacitor (typ.
100nF, min 47nF) must be connected between
this pin and USBVSS.
5
USBVDD
S
USB Power supply voltage (4V - 5.5V)
Note: External decoupling capacitors (typ.
4.7
F+100nF, min 2.2F+100nFmust be con-
nected between this pin and USBVSS.
6VDDF
SX
Power Line for alternate supply rail. Can be
used as input (with external supply) or output
(when using the on-chip voltage regulator).
Note: An external decoupling capacitor (min.
20nF) must be connected to this pin to stabilize
the regulator.
7VSSF
SX
Ground Line for alternate supply rail. Can be
used as input (with external supply) or output
(when using the on-chip voltage regulator)
8
PE5/DTC
I/O
X
CT HS X
2
X2
X
Port E5
DTC I/O with serial capability
(MMC_CMD)
9
PE6/DTC
I/O
X
CT HS X
X
Port E6
DTC I/O with serial capability
(MMC_DAT)
10
PE7/DTC
I/O
X
CT HS X
X
Port E7
DTC I/O with serial capability
(MMC_CLK)
11
PB0/DTC
I/O
X CT
X
Port B0
DTC
12
PB1/DTC
I/O
X CT
X
Port B1
DTC
13
PB2/DTC
I/O
X CT
X
Port B2
DTC
14
PB3/DTC
I/O
X CT
X
Port B3
DTC
15
PB4/DTC
I/O
X CT
X
Port B4
DTC
1
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