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参数资料
| 型号： | STB85NF55T4 |
| 英文描述： | TRANSISTOR | MOSFET | N-CHANNEL | 55V V(BR)DSS | 80A I(D) | TO-263AB |
| 中文描述： | 晶体管| MOSFET的| N沟道| 55V的五（巴西）直| 80A条（丁）|对263AB |
| 文件页数： | 1/9页 |
| 文件大小： | 154K |
| 代理商： | STB85NF55T4 |
1/9
November 2001
STB85NF3LL
N-CHANNEL 30V - 0.006
- 85A D
2
PAK
LOW GATE CHARGE STripFET
II POWER MOSFET
I
TYPICAL R
DS
(on) = 0.0075
(@4.5V)
I
OPTIMAL R
DS
(on) x Qg TRADE-OFF @4.5V
I
CONDUCTION LOSSES REDUCED
I
SWITCHING LOSSES REDUCED
I
ADD SUFFIX “T4” FOR ORDERING IN TAPE &
REEL
DESCRIPTION
This application specific Power MOSFET isthe third
genaration of STMicroelectronics unique “ Single
Feature Size” strip-based process. The resulting
transistor shows the best trade-off between on-re-
sistance and gate charge. When used as high and
low side in buck regulators, it gives the best perfor-
mance in terms of both conduction and switching
losses. This is extremely important for mother-
boards where fast switching and high efficiency are
of paramount importance.
APPLICATIONS
I
SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY CPU CORE DC/DC
CONVERTERS
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k
)
V
GS
Gate- source Voltage
V
GSM
Gate-source Voltage Pulsed
(t
p
≤
50
μ
s; duty cycle 25%; T
j
≤
150
°
C)
I
D
Drain Current (continuos) at T
C
= 25
°
C
Drain Current (continuos) at T
C
= 100
°
C
(
G
) Pulse width limited by safe operating area
TYPE
V
DSS
R
DS(on)
I
D
STB85NF3LL
30 V
< 0.008
85 A
Parameter
Value
30
Unit
V
V
DGR
30
V
±
16
±
20
V
V
85
A
I
D
60
A
I
DM
(
l
)
Drain Current (pulsed)
Total Dissipation at T
C
= 25
°
C
340
A
P
TOT
110
W
Derating Factor
0.73
W/
°
C
°
C
°
C
T
stg
Storage Temperature
–65 to 175
T
j
Max. Operating Junction Temperature
175
D
2
PAK
1
3
INTERNAL SCHEMATIC DIAGRAM
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