参数资料
型号: STCD23300F35F
厂商: STMICROELECTRONICS
元件分类: 时钟及定时
英文描述: 2330 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA12
封装: 1.20 X 1.60 MM, 0.40 MM PITCH, ROHS COMPLIANT, FLIP CHIP-12
文件页数: 9/39页
文件大小: 1948K
代理商: STCD23300F35F
STCD22x0, STCD23x0, STCD24x0
Application information
Doc ID 15400 Rev 2
4.8
Typical application connections
The STCD2400 clock distribution circuit requires a source clock input as the reference clock
(for example, XO). At most 4 devices can be connected to the outputs. The typical
application circuit using STCD2400 is shown in
Figure 9 and 10 . The MC
REQ is open drain
output and active low. A pull-up resistor is needed to connect to an external 1.8 V supply
VIO. If the clock source enable is active high, the user can use VTCXO as the master clock
enable control signal, please refer to
Figure 4 for the detailed connection.
In
Figure 9, the clock from XO is distributed to the TD-SCDMA transmitter and receiver and
GSM transceiver separately to be used as reference clocks.
In
Figure 10, the buffer #4 output is fed into the Bluetooth system. In order to allow minimum
power consumption, a Bluetooth system always has a clock request feature. If the Bluetooth
system does not require the clock, the clock request disables the clock output. The enable
pins can also be connected to an external 1.8 V supply to force the buffer to always be on.
In
Figure 9 and 10, all the output clock enables are active high since both OPT1 and OPT2
are connected to VCC.
Figure 9.
Typical application circuit using STCD24x0 for RF ends of TD-
SCDMA/GSM dual-mode mobile phone
STCD24x0
VCC
MCREQ
VTCXO
MCLK
EN1
EN2
GND
BYP
CLK1
CLK2
EN3
CLK3
EN4
CLK4
XO
EN
VIO
C
GSM
Transceiver
TD-SCDMA
Receiver
TD-SCDMA
Transmitter
Mode
Selection
OPT1
OPT2
VCC
V
DD
ai14022
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相关代理商/技术参数
参数描述
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