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参数资料
| 型号： | STCL132KWDEAW89 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | OTHER CLOCK GENERATOR, PDSO5 |
| 封装： | ROHS COMPLIANT, SOT-323-5, SC-70, 5 PIN |
| 文件页数： | 17/20页 |
| 文件大小： | 215K |
| 代理商： | STCL132KWDEAW89 |
Typical application circuit
STCL132K
6/20
2
Typical application circuit
Figure 2.
Microprocessor (MCU, microcontroller unit) clock – replacement of a 32 KHz crystal
1.
For reliable operation and to further improve immunity to harsh environment, the minimum 0.1 F decoupling capacitor is
recommended to be placed as close as possible to the VCC and GND pins of the oscillator device. The whole oscillator
block should then be placed near the microprocessor clock input.
2.
Internal 150 k
pull-down resistor is implemented on the CE input. If the chip enable feature is not used, in active mode
connect the CE pin to VCC. In applications utilizing standby mode and where the CE pin is connected to the controlling I/O
port of the clocked microprocessor, for successful startup of the microprocessor at power-on, initial logic high level needs to
be secured on the CE pin to ensure clocking occurs during the power-on reset until the microprocessor program starts and
the controlling I/O port takes over the CE control.
AI12659a
GND
VCC
CE (2)
NC
FOUT
1
2
3
5
4
MCU
I/O
Xtal1
(OSC1,
OSCin)
Xtal2
(OSC2,
OSCout)
NC
STCL132K
0.1 F (1)
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