3-4200-D1-2.0-0403
9
STIr4200
USB/IrDA Bridge Controller
O F F I C I A L P R O D U C T D O C U M E N T A T I O N
4.4.
Digital IR Transceiver
The Digital IR Transceiver is responsible for driving the transmit diode and receiving
the digital input from an analog IR front end. The primary components are the trans-
mit modulator, the receive demodulator, the FIFO, the analog transmit section, and
the register array. Figure 3 shows a block diagram of the Digital IR Transceiver. By
programming the registers in the register array, the device
’
s operation is deter-
mined. Various registers are used to specify operations such as the modulation
scheme, the baud rate, the current frame size in the FIFO, the RX input selection,
etc. The FIFO is 4K bytes in size.
In steady state transmit operation, the USB controller is filling the FIFO with data
while the Digital IR Transceiver is emptying it via the transmit modulator. In steady
state receive operation, the USB controller is emptying the FIFO while the RX
demodulator is filling the FIFO.
4.5.
FIFO Contents
Data sent to the USB controller for transmission by the TX modulator must be orga-
nized into frames. An IrLAP frame is made up of the following portions:
The NDIS IR stack only provides the A, C, and I fields to the NDIS mini-port device
driver that communicates with the USB/IrDA transceiver. Hence, the mini-port must
fill in the BOF, FCS, and EOF fields. Additionally, the driver must add a 2-byte
header ID code and a 2-byte frame size to the packet before passing the packet
onto the USB stack for delivery to the USB/IrDA transceiver. There are additional
special characters and required escape sequences depending upon the rate of
transfer. Details on the frame format for each of the support rates is discussed in the
following sections.
BOF
A
C
I
FCS
EOF
BOF
Beginning of frame(s)
A
C
I
Address field
Control field
Information field
Frame check sequence (CRC)
End of frame
Table 9. IrLAP Frame
FCS
EOF
TX Modulator
(ASK, IrDA FIR,MIR,SIR)
RX Demodulator
(ASK, IrDA FIR,MIR,SIR)
FIFO
Register Array
Analog TX
Section
RX
SLOW
RX
FAST
U
U
TX
DIODE
TX
DATA
Figure 3. Block Diagram of Digital IR Transceiver