参数资料
型号: STK17T88-RF45TR
元件分类: 时钟/数据恢复及定时提取
英文描述: PROGRAMMABLE TIMER, PDSO48
封装: 0.300 INCH, ROHS COMPLIANT, PLASTIC, SSOP-48
文件页数: 6/29页
文件大小: 535K
代理商: STK17T88-RF45TR
14
Jan, 2008
Document Control #ML0024 Rev 2.0
STK17T88
DATA PROTECTION
The STK17T88 protects data from corruption during
low-voltage conditions by inhibiting all externally
initiated STORE and WRITE operations. The low-
voltage condition is detected when VCC<VSWITCH.
If the STK17T88 is in a WRITE mode (both E and W
low) at power-up, after a RECALL, or after a
STORE, the WRITE will be inhibited until a negative
transition on E or W is detected. This protects
against inadvertent writes during power up or brown
out conditions.
NOISE CONSIDERATIONS
The STK17T88 is a high-speed memory and so
must have a high-frequency bypass capacitor of 0.1
F connected between both VCC pins and VSS
ground plane with no plane break to chip VSS. Use
leads and traces that are as short as possible. As
with all high-speed CMOS ICs, careful routing of
power, ground, and signals will reduce circuit noise..
PREVENTING AutoStore
Because of the use of nvSRAM to store critical RTC
data, the AutoStore function can not be disabled on
the STK17T88.
BEST PRACTICES
nvSRAM products have been used effectively for
over 15 years. While ease-of-use is one of the prod-
uct’s main system values, experience gained work-
ing with hundreds of applications has resulted in the
following suggestions as best practices:
The non-volatile cells in an nvSRAM are pro-
grammed on the test floor during final test and
quality assurance. Incoming inspection routines
at customer or contract manufacturer’s sites will
sometimes reprogram these values. Final NV pat-
terns are typically repeating patterns of AA, 55,
00, FF, A5, or 5A. End product’s firmware should
not assume an NV array is in a set programmed
state. Routines that check memory content val-
ues to determine first time system configuration,
cold or warm boot status, etc. should always pro-
gram a unique NV pattern (e.g., complex 4-byte
pattern of 46 E6 49 53 hex or more random
bytes) as part of the final system manufacturing
test to ensure these system routines work consis-
tently.
Power up boot firmware routines should rewrite
the nvSRAM into the desired state (autostore
enabled, etc.). While the nvSRAM is shipped in a
preset state, best practice is to again rewrite the
nvSRAM into the desired state as a safeguard
against events that might flip the bit inadvertently
(program bugs, incoming inspection routines,
etc.).
The OSCEN bit in the Calibration register at
0x7FF8 should be set to 1 to preserve battery life
when the system is in storage (see STOPPING
The Vcap value specified in this datasheet
includes a minimum and a maximum value size.
Best practice is to meet this requirement and not
exceed the max Vcap value because the nvSRAM
internal algorithm calculates Vcap charge time
based on this max Vcap value. Customers that
want to use a larger Vcap value to make sure
there is extra store charge and store time should
discuss their Vcap size selection with Simtek to
understand any impact on the Vcap voltage level
at the end of a tRECALL period.
相关PDF资料
PDF描述
STK17T88-RF45 PROGRAMMABLE TIMER, PDSO48
STK17T88-RF25ITR PROGRAMMABLE TIMER, PDSO48
STK17TA8-R25I REAL TIME CLOCK, PDSO48
STK17TA8-R35 REAL TIME CLOCK, PDSO48
STK17TA8-W25 REAL TIME CLOCK, PDIP40
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