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参数资料
| 型号： | STLR4200S |
| 厂商： | Electronic Theatre Controls, Inc. |
| 英文描述： | USB/lrDA Bridge Controller |
| 中文描述： | 的USB / lrDA桥控制器 |
| 文件页数： | 15/21页 |
| 文件大小： | 308K |
| 代理商： | STLR4200S |
3-4200-D1-2.0-0403
15
STIr4200
USB/IrDA Bridge Controller
O F F I C I A L P R O D U C T D O C U M E N T A T I O N
6.1.2.
Mode and Baud Rate Registers
Offset 1 and 2
6.1.2.1.
Mode Register
Offset 1
7
6.1.2.2.
Baud Rate Register
Offset 2
7
Below is a table of values to be written to the mode and baud rate registers to set
the required IrDA modes of operation:
Speed
Mode Register
6
5
4
3
2
1
0
Mode Register
Default State
FIR
0
Reserved
0
SIR
1
ASK
0
FASTRXEN FFRSTEN FFSPRST PDCLK(8)
0
0
0
0
Bit Number Bit Mnemonic Access
Function
7
FIR
R/W
When set, puts the infrared modulators into fast infrared mode (4PPM). Must
be mutually exclusive with the SIR bit.
Reserved. Write as zero.
When set, puts the infrared modulators into slow infrared mode. Must be
mutually exclusive with the FIR bit.
When set, puts the infrared modulators into amplitude shift keying infrared
mode.
Enables simultaneous reads and writes to/from the FIFO.
Allows the FIFO receive shift register to be automatically reset in FIR mode.
Manually resets the FIFO shift register. Must be set to
‘
1
’
to release the FIFO
shift register from reset.
MSB of baud rate register.
6
5
Reserved
SIR
RO
R/W
4
ASK
R/W
3
2
1
FASTRXEN
FFRSTEN
FFSPRST
R/W
R/W
R/W
0
PDCLK(8)
R/W
Table 12. Mode Register
6
5
4
PDCLK(7: 0)
1
3
2
1
0
Baud Rate Register
Default State
0
1
1
0
1
1
1
Bit Number Bit Mnemonic Access
Function
7:0
PDCLK (7 : 0)
R/W
Sets the divide ratio of the PLL for the infrared modulator/demodulator.
Table 13. Baud Rate Register
Operational Mode
Baud Rate Register
FIR
4.0 Mbps
115.2 Kbps
57.6 Kbps
38.4 Kbps
19.2 Kbps
9.6 Kbps
2.4 Kbps
0x80
0x20
0x20
0x20
0x20
0x20
0x21
0x02
0x09
0x13
0x1D
0x3B
0x77
0xDF
SIR
Table 14. Mode and Buad Rate Values for Required IrDA Modes of Operation
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