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参数资料
| 型号： | STLVD210BF |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 时钟及定时 |
| 英文描述： | LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封装： | TQFP-32 |
| 文件页数： | 5/9页 |
| 文件大小： | 163K |
| 代理商： | STLVD210BF |
Obsolete
Product(s)
- Obsolete
Product(s)
STLVD210
5/9
LVDS TIMING CHARACTERISTICS (TA = -40 to 85 °C, VCC = 2.5V ± 5%, unless otherwise noted. Typical
values are at TA = 25°C) (Note 1)
NOTE 1: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground
unless otherwise specified.
SPECIFICATION OF CONTROL REGISTER
The STLVD210 is provided with a 11 bit shift register with a Serial In and a Control Register. The purpose
is to enable or power of each output clock channel. The STLVD210 provides two working modality:
PROGRAMMED MODE (EN=1)
The shift register have a serial input to load the working configuration. Once the configuration is loaded
with 11-clock pulse, another clock pulse loads the configuration into the control register. The first bit on
the serial input line enables the outputs Qb4 and Qb4, the second bit enables the outputs Qb3 and Qb3
and so on. The last bit is the fewer significations. To restart the configuration of the shift register a reset
of the state machine must be done with a clock pulse on CK and the EN set to Low. The control register
can be configured on time after each reset.
STANDARD MODE (EN=0)
In Standard Mode the STLVD210 isn’t programmable, all the clock outputs are enabled.
TRUTH TABLE OF STATE MACHINE INPUTS
SERIAL INPUT SEQUENCE
Symbol
Parameter
Test Conditions
Value
Unit
Min.
Typ.
Max.
tTLH
Transition Time Low to High
RL = 100 ,CL = 5 pF
220
300
ps
tTHL
Transition Time High to Low
220
300
ps
tPHL, tPLH Propagation Delay to Output
2
2.5
ns
fMAX
Maximum Input Frequency
700
900
MHz
tSKEW
Bank Skew
50
ps
Part-to-Part Skew
100
Pulse Skew
60
EN
SI
CK
OUTPUT
L
X
All Outputs Enable
HL
First stage stores "L", other stages store the data of previous stage
HH
First stage stores "H", other stages store the data of previous stage
LX
Reset of the state machine, Shift register and Control Register
BIT#10
BIT#9
BIT#8
BIT#7
BIT#6
BIT#5
BIT#4
BIT#3
BIT#2
BIT#1
BIT#0
N.A.
Qa0
Qa1
Qa2
Qa3
Qa4
Qb0
Qb1
Qb2
Qb3
Qb4
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相关代理商/技术参数 |
参数描述 |
|---|---|
| STLVD210BFR | 功能描述:时钟缓冲器 Different Clock Drvr RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| STLVDS050 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:HIGH SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS |
| STLVDS050B | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:HIGH SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS |
| STLVDS050BD | 功能描述:缓冲器和线路驱动器 Hi-Spd Ln Drvr/Rcvr RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
| STLVDS050BDR | 功能描述:缓冲器和线路驱动器 Hi-Spd Ln Drvr/Rcvr RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
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