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参数资料
| 型号： | STM32F101RGT6 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 36 MHz, RISC MICROCONTROLLER, PQFP64 |
| 封装： | 10 X 10 MM, 0.50 MM PITCH, ROHS COMPLIANT, LQFP-64 |
| 文件页数： | 7/39页 |
| 文件大小： | 752K |
| 代理商： | STM32F101RGT6 |
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STM32F101xF, STM32F101xG
Description
Doc ID 17143 Rev 2
2.3.14
Voltage regulator
The regulator has three operation modes: main (MR), low power (LPR) and power down.
●
MR is used in the nominal regulation mode (Run)
●
LPR is used in the Stop modes.
●
Power down is used in Standby mode: the regulator output is in high impedance: the
kernel circuitry is powered down, inducing zero consumption (but the contents of the
registers and SRAM are lost)
This regulator is always enabled after reset. It is disabled in Standby mode.
2.3.15
Low-power modes
The STM32F101xF and STM32F101xG access line supports three low-power modes to
achieve the best compromise between low power consumption, short startup time and
available wakeup sources:
●
Sleep mode
In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can
wake up the CPU when an interrupt/event occurs.
●
Stop mode
Stop mode achieves the lowest power consumption while retaining the content of
SRAM and registers. All clocks in the 1.8 V domain are stopped, the PLL, the HSI RC
and the HSE crystal oscillators are disabled. The voltage regulator can also be put
either in normal or in low power mode.
The device can be woken up from Stop mode by any of the EXTI line. The EXTI line
source can be one of the 16 external lines, the PVD output or the RTC alarm.
●
Standby mode
The Standby mode is used to achieve the lowest power consumption. The internal
voltage regulator is switched off so that the entire 1.8 V domain is powered off. The
PLL, the HSI RC and the HSE crystal oscillators are also switched off. After entering
Standby mode, SRAM and register contents are lost except for registers in the Backup
domain and Standby circuitry.
The device exits Standby mode when an external reset (NRST pin), a IWDG reset, a
rising edge on the WKUP pin, or an RTC alarm occurs.
Note:
The RTC, the IWDG, and the corresponding clock sources are not stopped by entering Stop
or Standby mode.
2.3.16
DMA
The flexible 12-channel general-purpose DMAs (7 channels for DMA1 and 5 channels for
DMA2) are able to manage memory-to-memory, peripheral-to-memory and memory-to-
peripheral transfers.
The two DMA controllers support circular buffer management, removing the need for user
code intervention when the controller reaches the end of the buffer.
Each channel is connected to dedicated hardware DMA requests, with support for software
trigger on each channel. Configuration is made by software and transfer sizes between
source and destination are independent.
DMA can be used with the main peripherals: SPI, I2C, USART, general-purpose and basic
timers TIMx, DAC and ADC.
相关PDF资料 |
PDF描述 |
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| STM32F101RFT6XXX | 32-BIT, FLASH, 36 MHz, RISC MICROCONTROLLER, PQFP64 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| STM32F101RGT6TR | 功能描述:ARM微控制器 - MCU ARM Cortex M3 1Mb XL-Density 15 Timers RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 处理器系列:STM32F373xx 数据总线宽度:32 bit 最大时钟频率:72 MHz 程序存储器大小:256 KB 数据 RAM 大小:32 KB 片上 ADC:Yes 工作电源电压:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:LQFP-48 安装风格:SMD/SMT |
| STM32F101T4 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Low-density access line, ARM-based 32-bit MCU with 16 or 32 KB Flash, 5 timers, ADC and 4 communication interfaces |
| STM32F101T4T6ATR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Low-density access line, ARM-based 32-bit MCU with 16 or 32 KB Flash, 5 timers, ADC and 4 communication interfaces |
| STM32F101T4T6AXXX | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Low-density access line, ARM-based 32-bit MCU with 16 or 32 KB Flash, 5 timers, ADC and 4 communication interfaces |
| STM32F101T4T6TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Low-density access line, ARM-based 32-bit MCU with 16 or 32 KB Flash, 5 timers, ADC and 4 communication interfaces |
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