参数资料
型号: STM32F101VFT6XXX
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 36 MHz, RISC MICROCONTROLLER, PQFP100
封装: 14 X 14 MM, 0.50 MM PTCH, ROHS COMPLIANT, LQFP-100
文件页数: 5/39页
文件大小: 752K
代理商: STM32F101VFT6XXX
STM32F101xF, STM32F101xG
Description
Doc ID 17143 Rev 2
2.3.5
Embedded SRAM
80 Kbytes of embedded SRAM accessed (read/write) at CPU clock speed with 0 wait states.
2.3.6
FSMC (flexible static memory controller)
The FSMC is embedded in the STM32F101xF and STM32F101xG access line family. It has
four Chip Select outputs supporting the following modes: PC Card/Compact Flash, SRAM,
PSRAM, NOR and NAND.
Functionality overview:
The three FSMC interrupt lines are ORed in order to be connected to the NVIC
Write FIFO
Code execution from external memory except for NAND Flash and PC Card
The targeted frequency is HCLK/2, so external access is at 18 MHz when HCLK is at
36 MHz
2.3.7
LCD parallel interface
The FSMC can be configured to interface seamlessly with most graphic LCD controllers. It
supports the Intel 8080 and Motorola 6800 modes, and is flexible enough to adapt to
specific LCD interfaces. This LCD parallel interface capability makes it easy to build cost-
effective graphic applications using LCD modules with embedded controllers or high-
performance solutions using external controllers with dedicated acceleration.
2.3.8
Nested vectored interrupt controller (NVIC)
The STM32F101xF and STM32F101xG access line embeds a nested vectored interrupt
controller able to handle up to 60 maskable interrupt channels (not including the 16 interrupt
lines of Cortex-M3) and 16 priority levels.
Closely coupled NVIC gives low-latency interrupt processing
Interrupt entry vector table address passed directly to the core
Closely coupled NVIC core interface
Allows early processing of interrupts
Processing of late arriving higher priority interrupts
Support for tail-chaining
Processor state automatically saved
Interrupt entry restored on interrupt exit with no instruction overhead
This hardware block provides flexible interrupt management features with minimal interrupt
latency.
2.3.9
External interrupt/event controller (EXTI)
The external interrupt/event controller consists of 19 edge detector lines used to generate
interrupt/event requests. Each line can be independently configured to select the trigger
event (rising edge, falling edge, both) and can be masked independently. A pending register
maintains the status of the interrupt requests. The EXTI can detect an external line with a
pulse width shorter than the Internal APB2 clock period. Up to 112 GPIOs can be connected
to the 16 external interrupt lines.
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相关代理商/技术参数
参数描述
STM32F101VG 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:XL-density access line, ARM-based 32-bit MCU with 768 KB to 1 MB Flash, 15 timers, 1 ADC and 10 communication interfaces
STM32F101VGT6 功能描述:ARM微控制器 - MCU XL-Density Access Line 32-Bit 1G Flash RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 处理器系列:STM32F373xx 数据总线宽度:32 bit 最大时钟频率:72 MHz 程序存储器大小:256 KB 数据 RAM 大小:32 KB 片上 ADC:Yes 工作电源电压:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:LQFP-48 安装风格:SMD/SMT
STM32F101X4 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Low-density access line, ARM-based 32-bit MCU with 16 or 32 KB Flash, 5 timers, ADC and 4 communication interfaces
STM32F101X4_10 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Low-density access line, ARM-based 32-bit MCU with 16 or 32 KB Flash, 5 timers
STM32F101X6 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Low-density access line, ARM-based 32-bit MCU with 16 or 32 KB Flash, 5 timers, ADC and 4 communication interfaces