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参数资料
| 型号： | STM32F103RCY7XXX |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 72 MHz, RISC MICROCONTROLLER, PBGA64 |
| 封装： | 4.466 X 4.395 MM, 0.50 MM PITCH, ROHS COMPLIANT, WLCSP-64 |
| 文件页数： | 121/122页 |
| 文件大小： | 1599K |
| 代理商： | STM32F103RCY7XXX |
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Electrical characteristics
STM32F103xC, STM32F103xD, STM32F103xE
Doc ID 14611 Rev 6
Equation 1: RAIN max formula
The formula above (Equation 1) is used to determine the maximum external impedance allowed for an
error below 1/4 of LSB. Here N = 12 (from 12-bit resolution).
Table 59.
RAIN max for fADC = 14 MHz
(1)
1.
Guaranteed by design, not tested in production.
Ts (cycles)
tS (s)
RAIN max (k)
1.5
0.11
0.4
7.5
0.54
5.9
13.5
0.96
11.4
28.5
2.04
25.2
41.5
2.96
37.2
55.5
3.96
50
71.5
5.11
NA
239.5
17.1
NA
Table 60.
ADC accuracy - limited test conditions(1)(2)
1.
ADC DC accuracy values are measured after internal calibration.
2.
ADC Accuracy vs. Negative Injection Current: Injecting negative current on any of the standard (non-
robust) analog input pins should be avoided as this significantly reduces the accuracy of the conversion
being performed on another analog input. It is recommended to add a Schottky diode (pin to ground) to
standard analog pins which may potentially inject negative current.
Any positive injection current within the limits specified for IINJ(PIN) and IINJ(PIN) in Section 5.3.13 does not
affect the ADC accuracy.
Symbol
Parameter
Test conditions
Typ
Max(3)
3.
Based on characterization, not tested in production.
Unit
ET
Total unadjusted error
fPCLK2 = 56 MHz,
fADC = 14 MHz, RAIN < 10 k,
VDDA = 3 V to 3.6 V
TA = 25 °C
Measurements made after
ADC calibration
VREF+ = VDDA
±1.3
±2
LSB
EO
Offset error
±1
±1.5
EG
Gain error
±0.5
±1.5
ED
Differential linearity error
±0.7
±1
EL
Integral linearity error
±0.8
±1.5
R
AIN
T
S
f
ADC
C
ADC
2
N2
+
ln
--------------------------------------------------------------
R
ADC
–
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