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参数资料
型号： STM32F205ZFT6XXX
厂商： STMICROELECTRONICS
元件分类： 微控制器/微处理器
英文描述： 32-BIT, FLASH, 120 MHz, RISC MICROCONTROLLER, PQFP144
封装： 20 X 20 MM, ROHS COMPLIANT, LQFP-144
文件页数： 146/163页
文件大小： 2275K
代理商： STM32F205ZFT6XXX
STM32F205xx, STM32F207xx
Electrical characteristics
Doc ID 15818 Rev 7
83/163
5.3.11
PLL spread spectrum clock generation (SSCG) characteristics
The spread spectrum clock generation (SSCG) feature allows to reduce electromagnetic
interferences (see Table 37: EMI characteristics). It is available only on the main PLL.
Equation 1
The frequency modulation period (MODEPER) is given by the equation below:
Equation 2
Equation 2 allows to calculate the increment step (INCSTEP):
An amplitude quantization error may be generated because the linear modulation profile is
obtained by taking the quantized values (rounded to the nearest integer) of MODPER and
INCSTEP. As a result, the achieved modulation depth is quantized. The percentage
quantized modulation depth is given by the following formula:
Figure 34 and Figure 35 show the main PLL output clock waveforms in center spread and
down spread modes, where:
F0 is fPLL_OUT nominal.
Tmode is the modulation period.
md is the modulation depth.
Table 31.
SSCG parameters constraint
Symbol
Parameter
Min
Typ
Max(1)
Unit
fMod
Modulation frequency
-
10
KHz
md
Peak modulation depth
0.5
-
2
dec
MODEPER * INCSTEP
-
215
1dec
1.
Guaranteed by design, not tested in production.
MODEPER
round f
PLL_IN
4f
Mod
×
()
[]
=
INCSTEP
round
2
15
1
–
() md f
VCO_OUT
×
() 100 5
×
MODEPER
×
()
[]
=
md
quantized%
MODEPER
INCSTEP
×
100
×
5
×
()
2
15
1
–
() f
VCO_OUT
×
()
=
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