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参数资料
| 型号： | STM707M6E |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| 封装： | 0.150 INCH, ROHS COMPLIANT, PLASTIC, SOP-8 |
| 文件页数： | 3/32页 |
| 文件大小： | 832K |
| 代理商： | STM707M6E |
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STM705, STM706, STM707, STM708, STM813L
Operation
Doc ID 10520 Rev 9
3
Operation
3.1
Reset output
The STM705/706/707/708/813L supervisor asserts a reset signal to the MCU whenever
VCC goes below the reset threshold (VRST), a watchdog time-out occurs (if WDO is tied to
MR), or when the push-button reset input (MR) is taken low. RST is guaranteed to be a logic
low (logic high for STM707/708/813L) for VCC < VRST down to VCC =1 V for TA = 0 °C to
85 °C.
During power-up, once VCC exceeds the reset threshold an internal timer keeps RST low for
the reset time-out period, trec. After this interval RST returns high.
If VCC drops below the reset threshold, RST goes low. Each time RST is asserted, it stays
low for at least the reset time-out period (trec). Any time VCC goes below the reset threshold
the internal timer clears. The reset timer starts when VCC returns above the reset threshold.
3.2
Push-button reset input
A logic low on MR asserts reset. Reset remains asserted while MR is low, and for trec (see
Figure 29) after it returns high. The MR input has an internal 40
Ω pull-up resistor, allowing it
to be left open if not used. This input can be driven with TTL/CMOS-logic levels or with
open-drain/ collector outputs. Connect a normally open momentary switch from MR to GND
to create a manual reset function; external debounce circuitry is not required. If MR is driven
from long cables or the device is used in a noisy environment, connect a 0.1 F capacitor
from MR to GND to provide additional noise immunity. MR may float, or be tied to VCC when
not used.
3.3
Watchdog input (STM705/706/813L)
The watchdog timer can be used to detect an out-of-control MCU. If the MCU does not
toggle the Watchdog Input (WDI) within tWD (1.6 s), the reset is asserted. The internal 1.6s
timer is cleared by either:
1.
a reset pulse, or
2.
by toggling WDI (high-to-low or low-to-high), which can detect pulses as short as 50 ns.
If WDI is tied high or low, a reset pulse is triggered every 1.8 s (tWD + trec), if WDO is
connected to MR.
See Figure 30 for STM705/706/813L.
The timer remains cleared and does not count for as long as reset is asserted. As soon as
reset is released, the timer starts counting.
Note:
The watchdog function may be disabled by floating WDI or tri-stating the driver connected to
WDI. When tri-stated or disconnected, the maximum allowable leakage current is 10 A and
the maximum allowable load capacitance is 200 pF.
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PDF描述 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| STM707M6F | 功能描述:监控电路 4.63V Reset Suprvsr RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| STM708 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V Supervisor |
| STM708ADS6E | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5 V supervisor |
| STM708ADS6F | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5 V supervisor |
| STM708AM6E | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5 V supervisor |
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