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参数资料
| 型号： | STM8AF6146TDXXXX |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | MICROCONTROLLER, PQFP32 |
| 封装： | 7 X 7 MM, LQFP-32 |
| 文件页数： | 8/90页 |
| 文件大小： | 1466K |
| 代理商： | STM8AF6146TDXXXX |
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Product overview
STM8AF61xx STM8AH61xx
5.6.2
Internal 16 MHz RC oscillator
●
Default clock after reset 2 MHz (16 MHz/8)
●
Wake-up time: < 2 s
User trimming
The register CLK_HSITRIMR with three trimming bits plus one additional bit for the sign
permits frequency tuning to a precision of 1% by the application program. The trimming step
granularity is 0.7%. A position of the optionbyte 3 (16MHZTIMO) allows to select between
the two or three bit trimming mode.
The adjustment range covers all possible frequency variations versus supply voltage and
temperature. This trimming does not change the initial production setting.
5.6.3
Internal 128 kHz RC oscillator
The frequency of this clock is 128 kHz and it is independent from the main clock. It drives
the watchdog or the AWU wake-up timer.
In systems which do not need independent clock sources for the watchdog counters, the
128 kHz signal can be used as the system clock. This configuration has to be enabled by
setting an option byte (OPT3, LSI_EN).
5.6.4
Internal high-speed crystal oscillator
The internal high-speed crystal oscillator delivers the main clock in normal run mode. It
operates with quartz crystals and ceramic resonators.
●
Frequency range: 1 to 16 MHz
●
Crystal oscillation mode: Preferred fundamental
●
I/Os: Standard I/O pins multiplexed with OSCIN, OSCOUT
Optionally, an external clock signal can be injected into the OSCIN input pin.
5.6.5
External clock input
The external clock signal is applied to the OSCIN input pin of the crystal oscillator. The
frequency range is 0 to 16 MHz.
5.6.6
Clock security system (CSS)
The clock security system protects against a system stall in case of an external crystal clock
failure.
In case of a clock failure an interrupt is generated and the high speed internal clock (HSI) is
automatically selected with a frequency of 2 MHz (16 MHz/8). This function can be enabled
using the CSS register (CLK_CSSR).
The CSS operates by detecting when the external clock signal (crystal or external clock)
falls below 500 kHz. With active CSS this is the minimum operating frequency.
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