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参数资料
型号： STM8AH5168TDU
厂商： STMICROELECTRONICS
元件分类： 微控制器/微处理器
英文描述： 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP48
封装： 7 X 7 MM, ROHS COMPLIANT, LQFP-48
文件页数： 91/112页
文件大小： 2161K
代理商： STM8AH5168TDU
List of figures
STM8AF61xx, STM8AH61xx, STM8AF51xx, STM8AH51xx
8/112
Doc ID 14395 Rev 5
List of figures
Figure 1.
STM8A block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 2.
Flash memory organization of STM8A products. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 3.
LQFP 80-pin pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 4.
LQFP 64-pin pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 5.
LQFP 48-pin pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 6.
LQFP 32-pin pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 7.
Register and memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 8.
CAN register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 9.
CAN page mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 10.
Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 11.
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Figure 12.
fCPUmax versus VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Figure 13.
Typ. IDD(RUN)HSE vs. VDD @fCPU = 16 MHz, periph = on . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 14.
Typ. IDD(RUN)HSE vs. fCPU @VDD = 5.0 V, periph = on . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 15.
Typ. IDD(RUN)HSI vs. VDD @fCPU = 16 MHz, periph = off . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 16.
Typ. IDD(WFI)HSE vs. VDD @fCPU = 16 MHz, periph = on . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 17.
Typ. IDD(WFI)HSE vs. fCPU @VDD = 5.0 V, periph = on . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 18.
Typ. IDD(WFI)HSI vs. VDD @fCPU = 16 MHz, periph = off . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 19.
HSE external clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Figure 20.
HSE oscillator circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Figure 21.
Typical HSI frequency vs VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Figure 22.
Typical LSI frequency vs VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Figure 23.
Typical VIL and VIH vs VDD @ four temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Figure 24.
Typical pull-up resistance RPU vs VDD @ four temperatures . . . . . . . . . . . . . . . . . . . . . . . 82
Figure 25.
Typical pull-up current Ipu vs VDD @ four temperatures
(1) . . . . . . . . . . . . . . . . . . . . . . . . . 82
Figure 26.
Typ. VOL @ VDD = 3.3 V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure 27.
Typ. VOL @ VDD = 5.0 V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure 28.
Typ. VOL @ VDD = 3.3 V (true open drain ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure 29.
Typ. VOL @ VDD = 5.0 V (true open drain ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure 30.
Typ. VOL @ VDD = 3.3 V (high sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure 31.
Typ. VOL @ VDD = 5.0 V (high sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure 32.
Typ. VDD - VOH @ VDD = 3.3 V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Figure 33.
Typ. VDD - VOH @ VDD = 5.0 V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Figure 34.
Typ. VDD - VOH @ VDD = 3.3 V (high sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Figure 35.
Typ. VDD - VOH @ VDD = 5.0 V (high sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Figure 36.
Typical NRST VIL and VIH vs VDD @ four temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Figure 37.
Typical NRST pull-up resistance RPU vs VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Figure 38.
Typical NRST pull-up current Ipu vs VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Figure 39.
Recommended reset pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Figure 40.
SPI timing diagram in slave mode and with CPHA = 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Figure 41.
SPI timing diagram in slave mode and with CPHA = 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Figure 42.
SPI timing diagram - master mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Figure 43.
Typical application with ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Figure 44.
ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Figure 45.
80-pin low profile quad flat package (14 x 14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Figure 46.
64-pin low profile quad flat package (10 x 10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Figure 47.
48-pin low profile quad flat package (7 x 7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Figure 48.
32-pin low profile quad flat package (7 x 7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
相关PDF资料
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