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参数资料
| 型号： | STR711FRH3TR |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 66 MHz, RISC MICROCONTROLLER, PBGA64 |
| 封装： | 8 X 8 MM, 1.70 MM HEIGHT, LFBGA-64 |
| 文件页数： | 13/78页 |
| 文件大小： | 2018K |
| 代理商： | STR711FRH3TR |
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System architecture
STR71xF
20/78
1.
The Reset configuration of the I/O Ports is IPUPD (input pull-up/pull down). Refer to Table 8 on page 29.
The Port bit configuration at reset is PC0=1, PC1=1, PC2=0. The port data register bit (PD) value depends
on the pu/pd column which specifies whether the pull-up or pull-down is enabled at reset
2.
In reset state, these pins configured as Input PU/PD with weak pull-up enabled. They must be configured
by software as Alternate Function (see Table 8: Port bit configuration table on page 29) to be used by the
External Memory Interface.
3.
In reset state, these pins configured as Input PU/PD with weak pull-down enabled to output Address
0x0000 0000 using the External Memory Interface. To access memory banks greater than 1Mbyte, they
need to be configured by software as Alternate Function (see Table 8: Port bit configuration table on
page 29).
4.
V33IO-PLL and V33 are internally connected. VSSIO-PLL and VSS are internally connected.
5.
During the reset phase, these pins are in input pull-up state. When reset is released, they are configured as
Output Push-Pull.
6.
During the reset phase, these pins are in input pull-up state. When reset is released, they are configured as
Hi-Z.
7.
During the reset phase, these pins are in input pull-down state. When reset is released, they are configured
as Output Push-Pull.
8.
During the reset phase, this pin is in input floating state. When reset is released, it is configured as Output
Push-Pull.
143
C4
P0.8/U0.RX/
U0.TX
I/O pd
CT X4mA T
Port 0.8
UART0:
Receive Data
input
UART0: Transmit
data output.
Note: This pin may be used for single wire UART
(half duplex) if programmed as Alternate Function
Output. The pin will be tri-stated except when
UART transmission is in progress
144
B3
P0.9/U0.TX/
BOOT.0
I/O pd
CT
4mA
X
Port 0.9
Select Boot
Configuration
input
UART0: Transmit
data output
Table 4.
STR710 pin description
Pin n°
Pin name
Ty
p
e
R
eset
state
1)
Input
Output
Active
in
Stdb
y
Main
function
(after
reset)
Alternate function
LQ
FP14
4
BGA144
In
pu
tle
ve
l
inte
rrupt
Ca
pa
bi
li
ty
OD
PP
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