参数资料
型号: STR751FR0H6
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 48 MHz, RISC MICROCONTROLLER, PBGA64
封装: 8 X 8 MM. 1.70 MM HEIGHT, ROHS COMPLIANT, LFBGA-64
文件页数: 62/84页
文件大小: 1656K
代理商: STR751FR0H6
STR750Fxx STR751Fxx STR752Fxx STR755Fxx
Electrical parameters
SSP synchronous serial peripheral in slave mode (SPI or TI mode)
Subject to general operating conditions with CL 45 pF
Figure 33.
SPI configuration, slave mode with CPHA=0, single transfer
Table 39.
SSP slave mode characteristics(1)
1.
Data based on characterisation results, not tested in production.
Symbol
Parameter
Conditions
Min
Max
Unit
fSCK
SPI clock frequency
SSP0
2.66 MHz
(fPLCK/12)
MHz
SSP1
tsu(NSS)
NSS input setup time w.r.t
SCK first edge
SSP0
0
ns
SSP1
0
th(NSS)
NSS input hold time w.r.t
SCK last edge
SSP0
tPCLK+15ns
SSP1
tPCLK+15ns
tNSSLQV
NSS low to Data Output
MISO valid time
SSP0
2tPCLK
3tPCLK+30 ns
SSP1
2tPCLK
3tPCLK+30 ns
tNSSLQZ
NSS low to Data Output
MISO invalid time
SSP0
2tPCLK
3tPCLK+15 ns
SSP1
2tPCLK
3tPCLK+15 ns
tSCKQV
SCK trigger edge to data
output MISO valid time
SSP0
15
SSP1
30
tSCKQX
SCK trigger edge to data
output MISO invalid time
SSP0
2tPCLK
SSP1
2tPCLK
tsu(MOSI)
MOSI setup time w.r.t SCK
sampling edge
SSP0
0
SSP1
0
th(MOSI)
MOSI hold time w.r.t SCK
sampling edge
SSP0
3tPCLK+15 ns
SSP1
3tPCLK+15 ns
NSS INPUT
SCK
IN
PUT
CPHA=0
MOSI INPUT
MISO OUTPUT
CPHA=0
tc(SCK)
tw(SCKH)
tw(SCKL)
tr(SCK)
tf(SCK)
tSCKQV(MISO)
tsu(SI)
th(SI)
MSB OUT
MSB IN
BIT OUT
LSB IN
LSB OUT
CPOL=0
CPOL=1
tsu(NSS)
th(NSS)
tSCKQX(MISO)
BIT1 IN
sample
edge
trigger
edge
trigger
edge
tNSSHQZ
z
tNSSLQV
sample
edge
z
DONT CARE
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