ADVANCED COMMUNICATIONS & SENSING
Rev 1 – 30
th Oct. 2009
18
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SX1507/SX1508/SX1509
World’s Lowest Voltage Level Shifting GPIO
with LED Driver and Keypad Engine
4.6.4
Polarity Inverter
Each IO’s polarity can be individually inverted by setting corresponding bit in RegPolarity register. Please note
that polarity inversion can also be combined with level shifting feature.
4.7
Interrupt (NINT)
At start-up, the transition detection logic is reset, and NINT is released to a high-impedance state. The interrupt
mask register is set to 0xFF, disabling the interrupt output for transitions on all I/O ports. The transition flags are
cleared to indicate no data changes.
An interrupt NINT can be generated on any programmed combination of I/Os rising and/or falling edges through
the RegInterruptMask and RegSense registers.
If needed, the I/Os which triggered the interrupt can then be identified by reading RegInterruptSource register.
When NINT is low (i.e. interrupt occurred), it can be reset back high (i.e. cleared) by writing 0xFF in
RegInterruptSource (this will also clear corresponding bits in RegEventStatus register).
The interrupt can also be cleared automatically when reading RegData register (Cf. RegMisc)
Example: We want to detect rising edge of I/O[1] on SX1508 (NINT will go low).
1.
We enable interrupt on I/O[1] in RegInterruptMask
RegInterruptMask =“XXXXXX0X”
2.
We set edge sense for I/O[1] in RegSense
RegSenseLow =“XXXX01XX”
Please note that independently from the “user defined” process described above the keypad engine, when
enabled, also uses NINT to indicate a key press.
Hence we have NINT = “user defined condition occurred” OR “keypad engine condition occurred”.
4.8
Clock Management
A main oscillator clock fOSC is needed by the LED driver, keypad engine and debounce features.
Clock management block is illustrated in figure below.
OSCIO
Clock
Mgmt
Internal
Oscillator
External
Clock
fOSC
Div
Figure 14 – Clock Management Overview
The block is configured in register RegClock (Cf §5 for more detailed information):
Selection of internal clock source: none (OFF) or internal oscillator or external clock input from OSCIN.
Definition of OSCIO pin function (OSCIN or OSCOUT)
OSCOUT frequency setting (sub-multiple of fOSC)
Please note that if needed the OSCOUT feature can be used as an additional GPO (Cf. RegClock)
4.9
LED Driver
4.9.1
Overview
Every IO has its own independent LED driver to perform intensity control, blinking and fading operation. (Cf §6.2
for typical LED connection)
Please note that while all I/Os can perform intensity control (PWM) only some of them additionally include
blinking and breathing features (Cf pin description §1)
The LED drivers of all I/Os share the same clock ClkX configurable in RegMisc[6:4]. Please note that for power
consumption reasons ClkX is OFF by default.