参数资料
型号: SY100EP451LTGTR
厂商: Micrel Inc
文件页数: 8/10页
文件大小: 0K
描述: IC REGISTR DIFF 3.3V 6BIT 32TQFP
标准包装: 1,000
系列: 100EP
功能: 主复位
类型: D 型总线
输出类型: 差分
元件数: 1
每个元件的位元数: 6
触发器类型: 正边沿
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-TQFP
包装: 带卷 (TR)
其它名称: SY100EP451LTG TR
Micrel, Inc.
SY10/100EP451L
May 2007
7
M9999-051807-B
hbwhelp@micrel.com or (408) 955-1690
AC Electrical Characteristics(12)
VCC = 0V; VEE = –3.0V to –3.6V or VCC = 3.0V to 3.6V; VEE = 0V; TA = –40°C to +85°C; for 10EP and 100EP, unless
otherwise stated.
(13)
-40°C
25°C
85°C
Symbol
Parameter
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Units
VOUTpp
Output Voltage Amplitude at 3GHz
(14)
540
670
520
650
450
580
mV
tPD
Propagation Delay to
CLK to Q, /Q
Output Differential
MR to Q, /Q
330
380
430
530
630
350
400
450
550
650
390
440
490
590
690
ps
tRR
Reset Recovery
MR to CLK
240
100
250
100
260
100
ps
tS
Set-Up Time
D to CLK
80
0
80
0
80
0
ps
tH
Hold Time
CLK to D
80
0
80
0
80
0
ps
tPW
Minimum Pulse Rate
MR
400
ps
tSKEW
Within-Device Skew
(15)
Device-to-Device Skew
(16)
10
35
40
100
10
35
40
100
10
35
40
100
ps
tJITTER
Clock Random Jitter (RMS)
at ≤3.0GHz
0.2
1
0.2
1
0.2
1
ps
tr, tf
Output Rise/Fall Times
Q, /Q
(20% to 80%)
100
150
250
110
160
260
130
180
280
ps
Notes:
12. The device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with
maintained transverse airflow greater than 500lfpm. Electrical parameters are guaranteed only over the declared operating temperature range.
Functional operation of the device exceeding these conditions is not implied. Device specifications limit values are applied individually under normal
operating conditions and not valid simultaneously.
13. Measured using a 750mV source, 50% duty cycle clock source, all loading with 50 to VCC–2V.
14. VOL and VOH specifications not guaranteed for fMAX testing
15. Skew is measured between outputs under identical transitions and conditions on any one device.
16. Device-to-device skew for identical transitions at identical VCC levels.
Input Stage
Figure 1. Simplified Differential Input Buffer
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