参数资料
| 型号： | SY58609UMG TR |
| 厂商： | Micrel Inc |
| 文件页数： | 10/14页 |
| 文件大小： | 0K |
| 描述： | IC MUX 2:1 CML FSI INPUT 16-MLF |
| 标准包装： | 1,000 |
| 系列： | SY58 |
| 类型： | 多路复用器 |
| 电路： | 2 x 2:1 |
| 独立电路： | 1 |
| 电压电源： | 单电源 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-VFQFN 裸露焊盘，16-MLF? |
| 供应商设备封装： | 16-MLF?（3x3） |
| 包装： | 带卷 (TR) |
| 其它名称： | SY58609UMGTR SY58609UMGTR-ND |
Micrel, Inc.
SY58609U
August 2007
5
M9999-082907-C
hbwhelp@micrel.com or (408) 955-1690
AC Electrical Characteristics
(8)
VCC = +2.5V ±5% or +3.3V ±10%, RL = 100
across the outputs; Input t
R/tF < 300ps, TA = –40°C to +85°C, unless
otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
fMAX
Maximum Frequency
NRZ Data
4.25
Gbps
VOUT > 200mV
Clock
2.5
3
GHz
tPD
Propagation Delay
IN-to-Q
VIN: 100mV-200mV
180
330
450
ps
VIN: >200mV
140
270
370
ps
SEL-to-Q
150
450
ps
tSkew
Input-to-Input Skew
Note 9, 10
5
20
ps
Part-to-Part Skew
Note 11
150
ps
tJitter
Data
Random Jitter
Note 12
1
psRMS
Deterministic Jitter
Note 13
10
psPP
Clock
Cycle-to-Cycle Jitter
Note 14
1
psRMS
Total Jitter
Note 15
10
psPP
tR,tF
Output Rise/Fall Times
(20% to 80%)
At full output swing.
35
50
90
ps
Duty Cycle
Differential I/O
47
53
%
Notes:
8.
High-frequency AC-parameters are guaranteed by design and characterization.
9.
Input-to-Input skew is the time difference between the two inputs and one output, under identical input transitions.
9.
Input-to-Input Skew is included in IN-to-Q propagation delay.
11. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature, same transition edge, and no skew at
the edges at the respective inputs.
12. Random jitter is measured with a K28.7 pattern, measured at
≤ f
MAX.
13. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 2
23–1 PRBS pattern.
14. Cycle-to-cycle jitter definition: the variation period between adjacent cycles over a random sample of adjacent cycle pairs. tJITTER_CC = Tn –Tn+1,
where T is the time between rising edges of the output signal.
15. Total jitter definition: with an ideal clock input frequency of
≤ f
MAX (device), no more than one output edge in 10^12 output edges will deviate by
more than the specified peak-to-peak jitter value.
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相关代理商/技术参数 |
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| SY58610U | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.2Gbps Precision, LVPECL 2:1 MUX with Internal Termination and Fail Safe Input |
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| SY58610UMG | 功能描述:编码器、解码器、复用器和解复用器 4.25Gbps 2:1 LVPECL Mux w/ FSI Inputs RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量（输入/输出）:2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray |
| SY58610UMG TR | 功能描述:编码器、解码器、复用器和解复用器 4.25Gbps 2:1 LVPECL Mux w/ FSI Inputs RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量（输入/输出）:2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray |
| SY58610UMGTR | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.2Gbps Precision, LVPECL 2:1 MUX with |
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