参数资料
| 型号： | SY87700VZH TR |
| 厂商： | Micrel Inc |
| 文件页数： | 9/15页 |
| 文件大小： | 0K |
| 描述： | IC CLK/DATA RECOVERY 3.3V 28SOIC |
| 标准包装： | 1,000 |
| 系列： | AnyRate® |
| 类型： | 时钟和数据恢复（CDR），多路复用器 |
| PLL： | 是 |
| 主要目的： | 以太网，SONET/SDH，ATM 应用 |
| 输入： | PECL |
| 输出： | PECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:3 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 175Mbps |
| 电源电压： | 3.15 V ~ 5.25 V |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 28-SOIC |
| 包装： | 带卷 (TR) |
SY87700V
3
Micrel, Inc.
M9999-073008
hbwhelp@micrel.com or (408) 955-1690
PIN DESCRIPTIONS
INPUTS
RDINP, RDINN [Serial Data Input] Differential PECL.
These built-in line receiver inputs are connected to the
differential receive serial data stream. An internal receive
PLL recovers the embedded clock (RCLK) and data
(RDOUT) information. The incoming data rate can be within
one of five frequency ranges depending on the state of the
FREQSEL pins. See
“Frequency Selection” Table.
REFCLK [Reference Clock] TTL Inputs.
This input is used as the reference for the internal
frequency synthesizer and the “training” frequency for the
receiver PLL to keep it centered in the absence of data
coming in on the RDIN inputs.
CD [Carrier Detect] PECL Input.
This input controls the recovery function of the Receive
PLL and can be driven by the carrier detect output of optical
modules or from external transition detection circuitry. When
this input is HIGH the input data stream (RDIN) is recovered
normally by the Receive PLL. When this input is LOW the
data on the inputs RDIN will be internally forced to a constant
LOW, the data outputs RDOUT will remain LOW, the Link
Fault Indicator output LFIN forced LOW and the clock
recovery PLL forced to look onto the clock frequency
generated from REFCLK.
FREQSEL1, ..., FREQSEL3 [Frequency Select] TTL
Inputs.
These inputs select the output clock frequency range as
shown in the “Frequency Selection” Table.
DIVSEL1, DIVSEL2 [Divider Select] TTL Inputs.
These inputs select the ratio between the output clock
frequency (RCLK/TCLK) and the REFCLK input frequency
as shown in the “Reference Frequency Selection” Table.
CLKSEL [Clock Select] TTL Inputs.
This input is used to select either the recovered clock of
the receiver PLL (CLKSEL = HIGH) or the clock of the
frequency synthesizer (CLKSEL = LOW) to the TCLK
outputs.
OUTPUTS
LFIN [Link Fault Indicator] TTL Output.
This output indicates the status of the input data stream
RDIN. Active HIGH signal is indicating when the internal
clock recovery PLL has locked onto the incoming data
stream. LFIN will go HIGH if CD is HIGH and RDIN is within
the frequency range of the Receive PLL (1000ppm). LFIN
is an asynchronous output.
RDOUTP, RDOUTN [Receive Data Output] Differential
PECL.
These ECL 100K outputs (+3.3V or +5V referenced)
represent the recovered data from the input data stream
(RDIN). This recovered data is specified against the rising
edge of RCLK.
RCLKP, RCLKN [Clock Output] Differential PECL.
These ECL 100K outputs (+3.3V or +5V referenced)
represent the recovered clock used to sample the recovered
data (RDOUT).
TCLKP, TCLKN [Clock Output] Differential PECL.
These ECL 100K outputs (+3.3V or +5V referenced)
represent either the recovered clock (CLKSEL = HIGH) used
to sample the recovered data (RDOUT) or the transmit clock
of the frequency synthesizer (CLKSEL = LOW).
PLLSP, PLLSN [Clock Synthesis PLL Loop Filter]
External loop filter pins for the clock synthesis PLL.
PLLRP, PLLRN [Clock Recovery PLL Loop Filter]
External loop filter pins for the receiver PLL.
POWER & GROUND
VCC
Supply Voltage(1)
VCCA
Analog Supply Voltage(1)
VCCO
Output Supply Voltage(1)
GND
Ground
N/C
No Connect
Note 1.
VCC, VCCA, VCCO must be the same value.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SY87701 | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:CDR EVALUATION KIT |
| SY87701AL | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.3V 28Mbps to 1.3Gbps AnyRate Clock and Data Recovery |
| SY87701AL_07 | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.3V 28Mbps to 1.3Gbps AnyRate Clock and Data Recovery |
| SY87701ALHG | 功能描述:计时器和支持产品 3.3V Any Rate 32-1250 Mbps CDR (I Temp, Green/32 Pin EP-TQFP/Bulk) RoHS:否 制造商:Micrel 类型:Standard 封装 / 箱体:SOT-23 内部定时器数量:1 电源电压-最大:18 V 电源电压-最小:2.7 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装:Reel |
| SY87701ALHG TR | 功能描述:计时器和支持产品 3.3V Any-Rate 32-1250 Mbps CDR (I Temp, Green/32 Pin EP-TQFP/T+R) RoHS:否 制造商:Micrel 类型:Standard 封装 / 箱体:SOT-23 内部定时器数量:1 电源电压-最大:18 V 电源电压-最小:2.7 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装:Reel |
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