参数资料
| 型号： | SY88216LMG TR |
| 厂商： | Micrel Inc |
| 文件页数： | 5/11页 |
| 文件大小： | 0K |
| 描述： | IC LASER DRVR 2.5GBPS 3.6V 24MLF |
| 标准包装： | 1,000 |
| 类型： | 激光二极管驱动器（光纤） |
| 数据速率： | 2.5Gbps |
| 通道数： | 1 |
| 电源电压： | 3 V ~ 3.6 V |
| 电流 - 电源： | 55mA |
| 电流 - 调制： | 85mA |
| 电流 - 偏置： | 70mA |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 24-VFQFN 裸露焊盘，24-MLF? |
| 供应商设备封装： | 24-MLF?（4x4） |
| 包装： | 带卷 (TR) |
| 安装类型： | 表面贴装 |
Micrel, Inc.
AC Electrical Characteristics
T A = –40°C to +85°C and V CC = +3.0V to +3.6V. Unless otherwise noted, typical values are V CC = +3.3V,
T A = 25°C, I MOD = 25mA, I BIAS = 20mA.
SY88216L
Symbol
Parameter
Data Rate
Condition
NRZ
Min
0.155
Typ
Max
2.5
Units
Gbps
AC-coupled
10
85
mA
Modulation Current
I MOD
(5)
DC-coupled, Voltage at MOD Pin
≥0.6V
10
70
(6)
mA
I MOD_OFF
Modulation OFF Current
Current at MOD+ when /EN is
High or BEN is High
Current at MOD- when /EN is
High or BEN is Low
150
150
μA
μA
t r
t f
Output Current Rise Time
Output Current Fall Time
20% to 80%, I MOD = 60mA
20% to 80%, I MOD = 60mA
60
60
85
85
ps
ps
155Mbps
30
Total Jitter
Jitter
(7)
622Mbps
1.25Gbps
30
30
ps PP
2.5Gbps
30
Power up with /En Low and BEN
High
12
μs
t INIT
APC Loop Initialization Time
/EN Changes from High to Low
with Power ON and BEN High
10
μs
Burst Enable Delay
Burst Disable Delay
(8, 9)
(8, 10)
BEN Changes from Low to High
with Power ON and /EN Low
155Mbps
1.9
2.5
2.5
2
ns
ns
ns
μs
Burst ON-Time
Burst OFF-Time
622Mbps
1.25Gbps
2.5Gbps
155Mbps
622Mbps
1.25Gbps
2.5Gbps
720
576
576
1.9
720
576
576
ns
ns
ns
μs
ns
ns
ns
Notes:
5. Load = 15 ?.
6. Assuming V CC = 3.0V, Laser bandgap voltage = 1V, laser package inductance = 1nH, laser equivalent series resistor = 5 ?, and damp ing
resistor = 10 ?.
7. Total jitter is measured using 2 7 – 1 PRBS pattern.
8. Measured with a laser equivalent resistive load.
9. Burst Enable Delay is measured as the time between the instant when the BEN+ signal going from low to high reaches 50% of its amplitude
and the instant at which the modulation current or the bias current (whichever takes longer) reaches 90% of its final value.
10. Burst Disable Delay is measured as the time between the instant when the BEN+ signal going from high to low reaches 50% of its amplitude
and the instant at which the modulation current or the bias current (whichever takes longer) goes below 10% of its final value.
July 2008
5
M9999-071108-C
hbwhelp@micrel.com or (408) 955-1690
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