参数资料
| 型号： | SY88893VKC TR |
| 厂商： | Micrel Inc |
| 文件页数： | 3/8页 |
| 文件大小： | 0K |
| 描述： | IC AMP POST PECL 3.3V/5V 10-MSOP |
| 标准包装： | 1,000 |
| 类型： | 限幅后置放大器 |
| 应用： | 光纤学网络 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 10-MSOP |
| 包装： | 带卷 (TR) |
| 其它名称： | SY88893VKCTR SY88893VKCTR-ND |
Micrel, Inc.
SY898535L
June 2011
3
M9999-062211-B
hbwhelp@micrel.com
Pin Configuration
20-Pin TSSOP (K4-20-1)
Pin Description
Pin Number
Pin Name
Pin Function
1
VEE
Ground.
2
CLK_EN
Single-Ended Input: This TTL/CMOS input disables and enables the Q0-Q3 outputs. It is
internally connected to a 51k pull-up resistor and will default to a logic HIGH state if left open.
When disabled, Q goes LOW and /Q goes HIGH. CLK_EN being synchronous, outputs will be
enabled/disabled following a rising and a falling edge of the input clock. VTH = is approximately
1.5V.
3
CLK_SEL
Single-Ended Input: This single-ended TTL/CMOS-compatible input selects the input to the
multiplexer. If HIGH, selects CLK1 input. When LOW, it selects CLK0 input. Note that this input
is internally connected to a 51k pull-down resistor and will default to logic LOW state if left
open. VTH = is approximately 1.5V.
4
CLK0
Single-Ended Input: This LVCMOS or LVTTL signal is the input signal to the device. It is
internally connected to a 51k pull-down resistor and will default to a logic LOW state if left
open. This input is selected when CLK_SEL is set to logic LOW.
6
CLK1
Single-Ended Input: This LVCMOS or LVTTL signal is the input signal to the device. It is
internally connected to a 51k pull-down resistor and will default to a logic LOW state if left
open. This input is selected when CLK_SEL is set to logic HIGH.
5, 7, 8, 9
NC
Unused Pins
10, 13, 18
VCC
Positive Power Supply Pins: Bypass with 0.1F||0.01F low ESR capacitors as close to the VCC
pins as possible.
20, 19
17, 16
15, 14
12, 11
Q0, /Q0
Q1, /Q1
Q2, /Q2
Q3, /Q3
LVPECL Differential Output Pairs: Differential buffered output copies the selected input signal.
The output swing is typically 800mV. Unused output pairs may be left floating with no impact on
jitter. These differential LVPECL outputs are a logic function of the CLK0 and CLK1 inputs. See
“Truth Table” below.
or (408) 955-1690
相关PDF资料 |
PDF描述 |
|---|---|
| SY88903ALKG TR | IC POST AMP PECL LIMITING 10MSOP |
| SY88903KC TR | IC AMP POST PECL 3.3V TTL 10MSOP |
| SY88903VKC TR | IC AMP POST PECL 3.3V TTL 10MSOP |
| SY88913VKC TR | IC AMP LIMITING POST HS 10-MSOP |
| SY88913VKC | IC AMP LIMITING POST HS 10-MSOP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SY88893VKG | 功能描述:限幅放大器 3.3V/5V 155Mbps PECLPost Amplifier: 1xSD gain/1xTC/10 MSOP/Bulk (I Temp, Green) RoHS:否 制造商:Micrel 输入电压范围（最大值）:3.6 V 工作电源电压:3.3 V 电源电流:40 mA 工作温度范围:- 40 C to + 85 C 封装 / 箱体:MSOP-10 封装:Tube |
| SY88893VKG TR | 功能描述:限幅放大器 3.3V/5V 155Mbps PECLPost Amplifier: 1xSD gain/1xTC/10 MSOP/T+R (I Temp, Green) RoHS:否 制造商:Micrel 输入电压范围（最大值）:3.6 V 工作电源电压:3.3 V 电源电流:40 mA 工作温度范围:- 40 C to + 85 C 封装 / 箱体:MSOP-10 封装:Tube |
| SY88893VKGTR | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.3V/5V 155Mbps PECL LOW-POWER LIMITING POST AMPLIFIER W/TTL SIGNAL DETECT |
| SY88893VKI | 功能描述:IC AMP POST PECL 3.3V/5V 10-MSOP RoHS:否 类别:集成电路 (IC) >> 线性 - 放大器 - 专用 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:60 系列:- 类型:可变增益放大器 应用:CATV 安装类型:表面贴装 封装/外壳:20-WQFN 裸露焊盘 供应商设备封装:20-TQFN-EP（5x5） 包装:托盘 |
| SY88893VKI TR | 功能描述:IC AMP POST PECL 3.3V/5V 10-MSOP RoHS:否 类别:集成电路 (IC) >> 线性 - 放大器 - 专用 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:60 系列:- 类型:可变增益放大器 应用:CATV 安装类型:表面贴装 封装/外壳:20-WQFN 裸露焊盘 供应商设备封装:20-TQFN-EP（5x5） 包装:托盘 |
发布紧急采购，3分钟左右您将得到回复。