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参数资料
| 型号： | SY89200UTR |
| 厂商： | MICREL INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC32 |
| 封装： | 5 X 5 MM, MLF-32 |
| 文件页数： | 1/11页 |
| 文件大小： | 129K |
| 代理商： | SY89200UTR |
1
SY89200U
Micrel
M9999-061704
hbwhelp@micrel.com or (408) 955-1690
ULTRA-PRECISION 1:8 LVDS
FANOUT WITH THREE
÷1/÷2/÷4
CLOCK DIVIDER OUTPUT BANKS
Precision Edge
SY89200U
Rev.: A
Amendment: /0
Issue Date:
June 2004
DESCRIPTION
s Three low-skew LVDS output banks with
programmable
÷1, ÷2 and ÷4 divider options
s Three independently programmable output banks
s Guaranteed AC performance over temperature and
voltage:
Accepts a clock frequency up to 1.5GHz
<900ps IN-to-OUT propagation delay
<150ps rise/fall time
<50ps bank-to-bank phase offset
s Ultra-low jitter design:
<1psrms random jitter
<10pspp total jitter (clock)
s Patent-pending input termination and VT pin accepts
DC- and AC-coupled inputs (CML, PECL, LVDS)
s LVDS-compatible outputs
s CMOS/TTL-compatible output enable (EN) and
divider select control
s 2.5V
±5% power supply
s –40
°C to +85°C temperature range
s Available in 32-pin (5mm
××××× 5mm) MLF package
FEATURES
APPLICATIONS
s All SONET/SDH applications
s All Fibre Channel applications
s All Gigabit Ethernet applications
The SY89200U is a 2.5V precision, high-speed, integrated
clock divider and LVDS fanout buffer capable of handling
clocks up to 1.5GHz. Optimized for communications
applications, the three independently controlled output banks
are phase matched and can be configured for pass through
(
÷1), ÷2 or ÷4 divider ratios.
The differential input includes Micrel’s unique, 3-pin input
termination architecture that allows the user to interface to
any differential signal (AC or DC-coupled) as small as
200mVpp without any level shifting or termination resistor
networks in the signal path. The low-skew, low-jitter outputs
are LVDS compatible with extremely fast rise/fall times
guaranteed to be less than 150ps.
The EN (enable) input guarantees that the
÷1, ÷2 and ÷4
outputs will start from the same state without any runt pulse
after an asynchronous master reset (MR) is asserted. This
is accomplished by enabling the outputs after a four-clock
delay to allow the counters to synchronize.
The SY89200U is part of a Micrel’s Precision Edge
product family. All support documentation can be found at
Micrel's web site at www.micrel.com.
FUNCTIONAL BLOCK DIAGRAM
Precision Edge
MicroLead MLF is a trademark of Amkor Technology
Precision Edge is a trademark of Micrel, Inc.
2:1
MUX
2:1
MUX
2:1
MUX
1:4 LVDS
Fanout
1:3 LVDS
Fanout
LVDS
Output
÷1
÷2
÷4
DIVSEL1
(TTL/CMOS)
DIVSEL2
(TTL/CMOS)
DIVSEL3
(TTL/CMOS)
Select ÷2 or ÷4
/MR
(TTL/CMOS)
EN
(TTL/CMOS)
VREF-AC
IN
/IN
VT
Q0
/Q0
Q1
/Q1
Q2
/Q2
Q3
/Q3
Q4
/Q4
Q5
/Q5
Q6
/Q6
Q7
/Q7
50
50
Select ÷1 or ÷2
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SY89202U | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:Precision 1:8 LVPECL Fanout Buffer with Three ±1/±2/±4 Clock Divider Output Banks |
| SY89202U_10 | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:Precision 1:8 LVPECL Fanout Buffer with |
| SY89202UMG | 功能描述:时钟驱动器及分配 1:8 LVPECL fanout w/ Divide by 1, 2, 4 Dividers (I Temp, Green) RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| SY89202UMG TR | 功能描述:时钟驱动器及分配 1:8 LVPECL fanout w/ Divide by 1, 2, 4 Dividers (I Temp, Green) RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| SY89202UMGTR | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:Precision 1:8 LVPECL Fanout Buffer with |
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