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参数资料
| 型号： | SY89231UMG |
| 厂商： | MICREL INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 89231 SERIES, LOW SKEW CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC16 |
| 封装： | 3 X 3 MM, LEAD FREE, QFN-16 |
| 文件页数： | 9/15页 |
| 文件大小： | 419K |
| 代理商： | SY89231UMG |
Micrel, Inc.
SY89231U
November 2007
M9999-110507-A
hbwhelp@micrel.com or (408) 955-1690
3
Pin Description
Pin Number
Pin Name
Pin Function
1, 4
IN, /IN
Differential Input: This input pair is the differential signal input to the device,
which accepts AC- or DC-coupled signal as small as 100mV. The input internally
terminates to a VT pin through 50
. Note that this input pair will default to an
indeterminate state if left open. See “Input Interface Applications” subsection for
more details.
2
VT
Input Termination Center-Tap: Each side of the differential input pair terminates
to the VT pin. The VT pin provides a center-tap for the input (IN, /IN) to a
termination network for maximum interface flexibility. See “Input Interface
Applications” subsection for more details.
3
VREF-AC
Reference Voltage: This output biases to VCC–1.2V. It is used for AC-coupling
inputs IN and /IN. Connect VREF-AC directly to the VT pin. Bypass with 0.01F
low ESR capacitor to VCC. Due to limited drive capability, the VREF-AC pin is
only intended to drive its respective VT pin. Maximum sink/source current is
±0.5mA. For more details, see “Input Interface Applications” subsection.
5
EN
Single-ended Input: This TTL/CMOS-compatible input disables and enables the
output. It is internally connected to a 25k
pull-up resistor and will default to a
logic HIGH state if left open. When disabled, Q goes LOW and /Q goes HIGH.
EN being synchronous, outputs will be enabled/disabled after a rising and a
falling edge of the input clock. VTH = VCC/2.
6
/MR
Single-ended Input: This TTL/CMOS-compatible input, when pulled LOW,
asynchronously sets Q output LOW and /Q output HIGH. Note that this input is
internally connected to a 25k
pull-up resistor and will default to logic HIGH
state if left open. VTH = VCC/2.
7
NC
No Connect
8, 13
VCC
Positive Power Supply: Bypass with 0.1F in parallel with 0.01F low ESR
capacitors as close to the VCC pins as possible.
12, 9
Q, /Q
Differential Output: The output swing is typically 325mV. The output must be
terminated with 100
across the pair (Q, /Q). See the “Truth Table” below for the
logic function.
10, 11, 14,15
GND,
Exposed Pad
Ground: Ground and exposed pad must be connected to a ground plane that is
the same potential as the ground pins.
16
DIV_SEL
Single-ended Input: This TTL/CMOS-compatible input selects divide-by-3 when
pulled LOW and divide-by-5 when pulled HIGH. Note that this input is internally
connected to a 25k
pull-up resistor and will default to logic HIGH state if left
open. VTH = VCC/2.
Truth Table
Inputs
Outputs
DIV_SEL
EN
/MR
Q
/Q
X
0
1
0
1
÷3
1
÷5
X
0
1
0
1
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相关代理商/技术参数 |
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|---|---|
| SY89231UMG TR | 功能描述:时钟驱动器及分配 Divide-by-3 and 5 LVDS Clock Divider with Internal Termination and FSI (3.2GHz) RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| SY89231UMGTR | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:3.2GHz Precision, LVDS ÷3, ÷5 Clock Divider |
| SY89250V | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:ENHANCED DIFFERENTIAL RECEIVER |
| SY89250VMG | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:ENHANCED DIFFERENTIAL RECEIVER |
| SY89250VMG TR | 功能描述:缓冲器和线路驱动器 3.3V/5V Ultrasmall Oscillator Amplifier (I Temp, Green) RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
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