参数资料
| 型号： | SY89296UTG TR |
| 厂商： | Micrel Inc |
| 文件页数： | 17/17页 |
| 文件大小： | 0K |
| 描述： | IC DELAY LINE 1024TAP 32-TQFP |
| 标准包装： | 1,000 |
| 系列： | Precision Edge® |
| 标片/步级数： | 1024 |
| 功能： | 可编程 |
| 延迟到第一抽头： | 3.2ns |
| 接头增量： | 10ps |
| 可用的总延迟： | 3.2ns ~ 14.8ns |
| 独立延迟数： | 1 |
| 电源电压： | 2.375 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-TQFP |
| 供应商设备封装： | 32-TQFP |
| 包装： | 带卷 (TR) |
| 其它名称： | SY89296UTGTR SY89296UTGTR-ND |
Micrel, Inc.
SY89296U
November 2011
9
M9999-112211
hbwhelp@micrel.com or (408) 955-1690
AC Electrical Characteristics
(7) (Continued)
TA = –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
Set-Up Time
D t+o LEN
Note 10
200
D to IN
Note 11
350
tS
/EN to IN
300
ps
Hold Time
LEN to D
200
tH
IN to /EN
Note 12
400
ps
Release Time
/EN to IN
500
SETMAX to LEN
500
tR
SETMIN to LEN
450
ps
Cycle-to-Cycle Jitter
Note 13
2
psRMS
Total Jitter
Note 14
10
psPP
tJITTER
Random Jitter
Note 15
1
psRMS
20% to 80% (Q)
50
85
160
ps
tr, tf
Output Rise/Fall Time
20% to 80% (CASCADE)
90
300
ps
Duty Cycle
45
55
%
fT
FTUNE
0
≤ FTUNE ≤ 1.25V
47
52
Ps/V
Notes:
10. This setup time defines the amount of time prior to the input signal. The delay tap of the device must be set.
11. This setup time defines the amount of the time that /EN must be asserted prior to the next transition of IN, /IN to prevent an output response greater
than
±75mV to the IN, /IN transition.
12. Hold time is the minimum time that /EN must remain asserted after a negative going IN or a positive going /IN to prevent an output response
greater than
±75mV to that IN, /IN transition .
13. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles over a random sample of adjacent cycle pairs
Tjitter_cc = Tn Tn + 1, where T is the time between rising edges of the output signal.
14. Total jitter definition: with an ideal clock input, no more than one output edge in 10
12 output edges will deviate by more than the specified peak-to-
peak jitter value.
15. Random jitter definition: jitter that is characterized by a Gaussian distribution, unbounded and is quantified by its standard deviation and mean.
Random jitter is measured with a K28.7 comma defect pattern, measured at 1.5Gbps.
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| SY89295UTG TR | IC DELAY LINE 1024TAP 32-TQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SY89296UTI | 功能描述:IC DELAY LINE 1024TAP 32-TQFP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 延迟线 系列:Precision Edge® 标准包装:2,500 系列:- 标片/步级数:- 功能:多个，不可编程 延迟到第一抽头:10ns 接头增量:- 可用的总延迟:10ns 独立延迟数:4 电源电压:4.75 V ~ 5.25 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:14-SOIC（0.154"，3.90mm 宽） 供应商设备封装:14-SOIC 包装:带卷 (TR) |
| SY89296UTI TR | 功能描述:IC DELAY LINE 1024TAP 32-TQFP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 延迟线 系列:Precision Edge® 标准包装:2,500 系列:- 标片/步级数:- 功能:多个，不可编程 延迟到第一抽头:10ns 接头增量:- 可用的总延迟:10ns 独立延迟数:4 电源电压:4.75 V ~ 5.25 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:14-SOIC（0.154"，3.90mm 宽） 供应商设备封装:14-SOIC 包装:带卷 (TR) |
| SY89296UTITR | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:2.5V/3.3V 1.5GHz PRECISION LVPECL PROGRAMMABLE DELAY WITH FINE TUNE CONTROL |
| SY89297U | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:2.5/3.3V, 3.2Gbps Precision CML |
| SY89297UMG | 功能描述:延迟线/计时元素 2.5/3.3V Dual Channel Delay Line with 5ps Step Delay (improved SY89295), Industrial, Recommended for New Designs RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 传播延迟时间:1000 ps 工作温度范围: 封装 / 箱体:QFN-24 封装:Tube |
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