参数资料
| 型号： | SY89429VZH TR |
| 厂商： | Micrel Inc |
| 文件页数： | 5/10页 |
| 文件大小： | 0K |
| 描述： | IC SYNTHESIZER FREQ PROGR 28SOIC |
| 标准包装： | 1,000 |
| 系列： | Precision Edge® |
| 类型： | 频率合成器 |
| PLL： | 是 |
| 输入： | 晶体 |
| 输出： | PECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:1 |
| 差分 - 输入:输出： | 无/是 |
| 频率 - 最大： | 800MHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 3.135 V ~ 5.25 V |
| 工作温度： | 0°C ~ 75°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 28-SOIC |
| 包装： | 带卷 (TR) |
| 其它名称： | SY89429VZHTR SY89429VZHTR-ND |
4
Precision Edge
SY89429V
Micrel, Inc.
M9999-011106
hbwhelp@micrel.com or (408) 955-1690
PIN DESCRIPTIONS
INPUTS
XTAL1, XTAL2
These pins form an oscillator when connected to an external
crystal. The crystal is series resonant. See “AN-07” for Crystal
Interface Guideline.
S_LOAD
This TTL pin loads the configuration latches with the contents
of the shift registers. The latches will be transparent when this
signal is HIGH; thus, the register data must be stable on the
HIGH-to-LOW transition of S_LOAD for proper operation.
S_DATA
This TTL pin is the input to the serial configuration shift
registers.
S_CLOCK
This TTL pin clocks the serial configuration shift registers. On
the rising edge of this signal, data from S_DATA is sampled.
/P_LOAD
This TTL pin loads the configuration latches with the contents
of the parallel inputs. The latches will be transparent when this
signal is LOW: Thus, the parallel data must be stable on the
LOW-to-HIGH transition of /P_LOAD for proper operation.
During power up, hold /P_LOAD low with a valid M count on
M[0] - M[8] until supplies have stabilized.
M[8:0]
These TTL pins are used to configure the PLL loop divider.
They are sampled on the LOW-to-HIGH transition of /P_LOAD.
M[8] is the MSB, M[0] is the LSB. The binary count on the M
pins equates to the divide-by value for the PLL.
N[1:0]
These TTL pins are used to configure the output divider
modulus. They are sampled on the LOW-to-HIGH transition
of /P_LOAD.
OUTPUTS
FOUT, /FOUT
These differential positive-referenced ECL signals (PECL)
are the output of the synthesizer.
TEST
The function of this TTL output is determined by the serial
configuration bits T[2:0].
POWER
VCC1
This is the positive supply for the chip and is normally
connected to +3.3V or +5.0V.
VCC_OUT
This is the positive reference for the PECL outputs, FOUT and
/FOUT. It is constrained to be less than or equal to VCC1.
VCC_QUIET
This is the positive supply for the PLL and should be as noise-
free as possible for low-jitter operation.
GND
These pins are the negative supply for the chip and are
normally all connected to ground.
OTHER
LOOP_FILTER
This is an analog I/O pin that provides the loop filter for the
PLL.
LOOP_REF
This is an analog I/O pin that provides a reference voltage for
the PLL.
N[1:0]
Output Division
0 0
2
0 1
4
1 0
8
1 1
16
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SY89430 | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:5V/3.3V PROGRAMMABLE FREQUENCY SYNTHESIZER (50MHz to 950MHz) |
| SY89430V | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:5V/3.3V PROGRAMMABLE FREQUENCY SYNTHESIZER (50MHz to 950MHz) |
| SY89430V_06 | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:5V/3.3V PROGRAMMABLE FREQUENCY SYNTHESIZER (50MHz to 950MHz) |
| SY89430VJC | 功能描述:IC SYNTHESIZER FREQ PROGR 28PLCC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:Precision Edge® 产品变化通告:Product Discontinuation 04/May/2011 标准包装:96 系列:- 类型:时钟倍频器，零延迟缓冲器 PLL:带旁路 输入:LVTTL 输出:LVTTL 电路数:1 比率 - 输入:输出:1:8 差分 - 输入:输出:无/无 频率 - 最大:133.3MHz 除法器/乘法器:是/无 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:管件 其它名称:23S08-5HPGG |
| SY89430VJC TR | 功能描述:IC SYNTHESIZER FREQ PROGR 28PLCC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:Precision Edge® 产品变化通告:Product Discontinuation 04/May/2011 标准包装:96 系列:- 类型:时钟倍频器，零延迟缓冲器 PLL:带旁路 输入:LVTTL 输出:LVTTL 电路数:1 比率 - 输入:输出:1:8 差分 - 输入:输出:无/无 频率 - 最大:133.3MHz 除法器/乘法器:是/无 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:管件 其它名称:23S08-5HPGG |
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