参数资料
型号: SY89465UMY TR
厂商: Micrel Inc
文件页数: 1/20页
文件大小: 0K
描述: IC CLOCK MUX 2:10 2GHZ 44-MLF
标准包装: 1,000
系列: Precision Edge®
类型: 多路复用器
电路数: 1
比率 - 输入:输出: 2:10
差分 - 输入:输出: 是/是
输入: CML,LVDS,PECL
输出: LVDS
频率 - 最大: 2GHz
电源电压: 2.375 V ~ 2.625 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 44-VFQFN 裸露焊盘,44-MLF?
供应商设备封装: 44-MLF?(7x7)
包装: 带卷 (TR)
SY89465U
Precision LVDS 1:10 Fanout with 2:1 Runt
Pulse Eliminator MUX and Internal Termination
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com
August 2010
M9999-080510-C
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY89465U is a low-jitter, 1:10 LVDS fanout
buffer with a 2:1 differential input multiplexer (MUX)
optimized
for
redundant
source
switchover
applications. Unlike standard multiplexers, the
SY89465Us 2:1 Runt Pulse Eliminator (RPE) MUX
prevents any short cycles or “runt” pulses during
switchover. In addition, a unique Fail-Safe Input
(FSI) protection prevents metastable conditions
when the selected input clock fails to a DC voltage
(voltage between the pins of the differential input
drops below 100mV).
The differential input includes Micrel’s, 3-pin internal
termination architecture that allows customers to
interface to any differential signal (AC- or DC-
coupled) as small as 100mV (200mVPP) without any
level shifting or termination resistor networks in the
signal path. The outputs are LVDS-compatible with
fast rise/fall times guaranteed to be less than 220ps.
The SY89465U operates from a 2.5V ±5% supply
and
is
guaranteed
over
the
full
industrial
temperature range of –40°C to +85°C. The
SY89465U is part of Micrel’s high-speed, Precision
Edge
product line.
All support documentation can be found on Micrel’s
web site at: www.micrel.com.
Precision Edge
Features
Selects between two sources, and provides 10
precision LVDS copies
Guaranteed AC performance over temperature and
supply voltage:
– Wide operating frequency: 1kHz to >1.5GHz
– <1200ps In-to-Out tpd
– <220ps tr/tf
Unique, patent-pending input isolation design
minimizes adjacent channel crosstalk
Fail-Safe Input prevents oscillations
Ultra-low jitter design:
– 183 fsRMS phase jitter (typical)
– <0.7psRMS MUX crosstalk-induced jitter
Unique patented input termination and VT pin accepts
DC- and AC-coupled inputs (CML, PECL, LVDS)
325mV LVDS output swing
2.5V ±5% supply voltage
40°C to +85°C industrial temperature range
Output enable
Available in 44-pin (7mm x 7mm) QFN package
Applications
Redundant clock switchover
Fail-safe clock protection
Markets
LAN/WAN
Enterprise servers
ATE
Test and measurement
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