参数资料
型号: SY89482LMG
厂商: MICREL INC
元件分类: 时钟及定时
英文描述: LOW SKEW CLOCK DRIVER, QCC24
封装: 4 X 4 MM, LEAD FREE, MLF-24
文件页数: 1/16页
文件大小: 425K
代理商: SY89482LMG
SY89482L
3.3V, 622MHz to 694MHz CML Jitter
Attenuator with Internal Termination
Precision Edge is a registered trademark of Micrel, Inc.
MLF and MicroLeadFrame are registered trademarks of Amkor Technology.
Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com
April 2008
M9999-040808-A
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY89482L is a 3.3V, fully differential CML jitter
attenuator that accepts a noisy clock between 622MHz
and 694MHz, and provides an ultra-low jitter of the input
clock signal. Output jitter is typically 1psRMS. The
SY89482L includes a 1kHz to 10kHz programmable
loop bandwidth so it can accommodate different jitter
attenuation applications and PLL requirements.
The differential input includes Micrel’s unique, 3-pin
input termination architecture that interfaces to LVPECL,
LVDS or CML differential signals, (AC-coupled or DC-
coupled) as small as 100mV without any level-shifting or
termination resistor networks in the signal path. For AC-
coupled input interface applications, an on-board output
reference voltage (VREF-AC) is provided to bias the VT pin.
The outputs are compatible with 400mV typical swing
into 50
loads, with rise/fall times guaranteed to be less
than 250ps
The SY89482L operates at 3.3V ±10% supply and the
output can accommodate 1.8V-3.3V operation with the
dedicated output supply. The part is guaranteed to
operate over the full industrial temperature range
(–40°C to +85°C). The SY89482L is part of Micrel’s
Precision Edge
product line.
Datasheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
Precision Edge
Features
Input frequency matched, low-jitter output
I/O frequency range: 622MHz – 694MHz
Ultra-low phase noise and jitter performance
– <2psRMS output jitter gen (12 kHz-20MHz)
– Low phase noise: -80dBc/Hz at 1 kHz offset
CML-compatible output signal
3-pin input accepts an AC- or DC-coupled differential
input (LVDS, LVPECL, and CML)
Unique, Auto-Tune circuitry enables precision
frequency calibration.
Internal source termination to minimize round-trip
reflections
Programmable loop bandwidth: 1kHz-10kHz
Output enable/disable function
Includes Loss of Lock (LOL) output pin
1.8V ±5% to 3.3V ±10% output power supply
3.3V ±10% power supply operation
Industrial temperature range: –40°C to +85°C
Available in 24-pin (4mm x 4mm) MLF
package
Applications
SONET/SDH Communications
10GbE FEC
10GbE LAN PHY
High-end Routers
Add-Drop MUXes
SAS/SATA
相关PDF资料
PDF描述
SY89482LMGTR LOW SKEW CLOCK DRIVER, QCC24
SY89531LHZ 622.08 MHz, OTHER CLOCK GENERATOR, PQFP64
SY89534LHZ 89534 SERIES, PLL BASED CLOCK DRIVER, 13 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64
SY89534LHZTR 89534 SERIES, PLL BASED CLOCK DRIVER, 13 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64
SY89536LHZ 89536 SERIES, PLL BASED CLOCK DRIVER, 13 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64
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